| /external/valgrind/main/VEX/priv/ |
| H A D | guest_mips_toIR.c | 86 #define DIP(format, args...) \ macro
1551 DIP("dsrl r%u, r%u, %d", regRd, regRt, (Int)sImmsa);
1557 DIP("drotr r%u, r%u, %d", regRd, regRt, (Int)sImmsa);
1572 DIP("dsrl32 r%u, r%u, %d", regRd, regRt, (Int)(sImmsa + 32));
1577 DIP("drotr32 r%u, r%u, %d", regRd, regRt, (Int)sImmsa);
1595 DIP("dsrlv r%u, r%u, r%u", regRd, regRt, regRs);
1604 DIP("drotrv r%u, r%u, r%u", regRd, regRt, regRs);
1631 DIP("dsll r%u, r%u, %d", regRd, regRt, (Int)sImmsa);
1638 DIP("dsll32 r%u, r%u, %d", regRd, regRt, (Int)sImmsa);
1644 DIP("dsll
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| H A D | guest_arm64_toIR.c | 138 #define DIP(format, args...) \ macro
1927 DIP("%ss %s, %s, 0x%x\n",
1931 DIP("%s %s, %s, 0x%x\n",
1945 DIP("%ss %s, %s, 0x%x\n",
1949 DIP("%s %s, %s, 0x%x\n",
1972 DIP("adr%s %s, 0x%llx\n", bP ? "p" : "", nameIReg64orZR(rD), val);
2013 DIP("%s %s, %s, 0x%llx\n", names[op],
2018 DIP("%s %s, %s, 0x%llx\n", names[op],
2028 DIP("%s %s, %s, 0x%x\n", names[op],
2033 DIP("
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| H A D | guest_arm_toIR.c | 171 #define DIP(format, args...) \ macro
2873 DIP("vext.8 %c%d, %c%d, %c%d, #%d\n", reg_t, dreg, reg_t, nreg,
2973 DIP("vtb%c.8 d%u, {", op ? 'x' : 'l', dreg);
2975 DIP("d%u-d%u", nreg, nreg + len);
2977 DIP("d%u", nreg);
2979 DIP("}, d%u\n", mreg);
3033 DIP("vdup.%d %c%d, d%d[%d]\n", size, Q ? 'q' : 'd', dreg, mreg, index);
3140 DIP("vhadd.%c%d %c%d, %c%d, %c%d\n",
3199 DIP("vqadd.%c%d %c%d, %c%d, %c%d\n",
3310 DIP("vrhad
21880 #undef DIP macro
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| H A D | guest_x86_toIR.c | 219 #define DIP(format, args...) \ macro
1879 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
1908 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
1992 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
2044 DIP("%s%c %s,%s\n", t_x86opc, nameISize(size),
2078 DIP("mov%c %s,%s\n", nameISize(size),
2088 DIP("mov%c %s,%s\n", nameISize(size),
2122 DIP("mov%c %s,%s\n", nameISize(size),
2132 DIP("mov%c %s,%s\n", nameISize(size),
2182 DIP("
15403 #undef DIP macro
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| H A D | guest_amd64_toIR.c | 366 #define DIP(format, args...) \ macro
2967 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
2996 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3081 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3133 DIP("%s%c %s,%s\n", t_amd64opc, nameISize(size),
3168 DIP("mov%c %s,%s\n", nameISize(size),
3178 DIP("mov%c %s,%s\n", nameISize(size),
3219 DIP("mov%c %s,%s\n", nameISize(size),
3231 DIP("mov%c %s,%s\n", nameISize(size),
3283 DIP("
31727 #undef DIP macro
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| H A D | guest_ppc_toIR.c | 206 #define DIP(format, args...) \ macro
3234 DIP("addic r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3243 DIP("addic. r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3257 DIP("li r%u,%d\n", rD_addr, (Int)simm16);
3260 DIP("addi r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3269 DIP("lis r%u,%d\n", rD_addr, (Int)simm16);
3272 DIP("addis r%u,r%u,0x%x\n", rD_addr, rA_addr, (Int)simm16);
3279 DIP("mulli r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3291 DIP("subfic r%u,r%u,%d\n", rD_addr, rA_addr, (Int)simm16);
3307 DIP("ad
19925 #undef DIP macro
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