| /external/llvm/utils/TableGen/ |
| H A D | CallingConvEmitter.cpp | 218 MVT::SimpleValueType DestVT = getValueType(DestTy); local
219 O << IndentStr << "LocVT = " << getEnumName(DestVT) <<";\n";
220 if (MVT(DestVT).isFloatingPoint()) {
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeTypes.cpp | 888 EVT DestVT) {
892 SDValue StackPtr = DAG.CreateStackTemporary(Op.getValueType(), DestVT);
897 return DAG.getLoad(DestVT, dl, Store, StackPtr, MachinePointerInfo(),
887 CreateStackStoreLoad(SDValue Op, EVT DestVT) argument
|
| H A D | LegalizeVectorTypes.cpp | 236 EVT DestVT = N->getValueType(0).getVectorElementType(); local
238 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
1011 EVT DestVT = N->getValueType(0); local
1013 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT);
1030 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) {
|
| /external/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 904 MVT DestVT = TLI->getRegisterType(NewVT); local
905 RegisterVT = DestVT;
906 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
907 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
1251 MVT DestVT = getRegisterType(Context, NewVT); local
1252 RegisterVT = DestVT;
1259 if (EVT(DestVT).bitsLT(NewVT)) // Value is expanded, e.g. i64 -> i16.
1260 return NumVectorRegs*(NewVTSize/DestVT.getSizeInBits());
|
| /external/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 129 unsigned EmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
130 unsigned Emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt);
1027 MVT DestVT = DestEVT.getSimpleVT();
1028 if (DestVT != MVT::i32 && DestVT != MVT::i64 && DestVT != MVT::f32 &&
1029 DestVT != MVT::f64)
1057 switch (DestVT.SimpleTy) {
1074 unsigned ResultReg = createResultReg(TLI.getRegClassFor(DestVT));
1119 MVT DestVT; local
1152 MVT DestVT; local
1223 MVT DestVT = VA.getLocVT(); local
1233 MVT DestVT = VA.getLocVT(); local
1658 MVT DestVT = DestEVT.getSimpleVT(); local
1707 Emiti1Ext(unsigned SrcReg, MVT DestVT, bool isZExt) argument
1750 EmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) argument
1836 MVT DestVT = DestEVT.getSimpleVT(); local
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 152 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
831 EVT DestVT = TLI.getValueType(I->getType(), true); local
833 if (SrcVT != MVT::f32 || DestVT != MVT::f64)
849 EVT DestVT = TLI.getValueType(I->getType(), true); local
851 if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1090 EVT DestVT = TLI.getValueType(I->getType(), true); local
1094 if (DestVT != MVT::i16 && DestVT != MVT::i8)
1261 MVT DestVT = VA.getLocVT(); local
1263 (DestVT
1273 MVT DestVT = VA.getLocVT(); local
1327 MVT DestVT = VA.getValVT(); local
1571 MVT DestVT = VA.getLocVT(); local
1624 PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, unsigned DestReg, bool IsZExt) argument
1696 EVT DestVT = TLI.getValueType(I->getType(), true); local
1740 MVT DestVT = DestEVT.getSimpleVT(); local
[all...] |
| /external/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 183 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
1751 EVT DestVT = TLI.getValueType(I->getType(), true); local
1755 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
1954 MVT DestVT = VA.getLocVT(); local
1955 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
1957 ArgVT = DestVT;
1963 MVT DestVT = VA.getLocVT(); local
1964 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZEx
2036 MVT DestVT = RVLocs[0].getValVT(); local
2116 MVT DestVT = VA.getValVT(); local
2572 EVT SrcVT, DestVT; local
2590 ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt) argument
2745 MVT DestVT = DestEVT.getSimpleVT(); local
[all...] |