/external/llvm/lib/Target/Mips/ |
H A D | Mips16ISelDAGToDAG.cpp | 51 SDValue InFlag = SDValue(Mul, 0); local 55 Lo = CurDAG->getMachineNode(Opcode, DL, Ty, MVT::Glue, InFlag); 56 InFlag = SDValue(Lo, 1); 60 Hi = CurDAG->getMachineNode(Opcode, DL, Ty, InFlag); 258 SDValue InFlag = Node->getOperand(2), CmpLHS; local 259 unsigned Opc = InFlag.getOpcode(); (void)Opc; 266 CmpLHS = InFlag.getValue(0); 269 CmpLHS = InFlag.getOperand(0); 273 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) };
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H A D | MipsSEISelDAGToDAG.cpp | 232 SDNode *MipsSEDAGToDAGISel::selectAddESubE(unsigned MOp, SDValue InFlag, argument 235 unsigned Opc = InFlag.getOpcode(); (void)Opc; 241 SDValue Ops[] = { CmpLHS, InFlag.getOperand(1) }; 645 SDValue InFlag = Node->getOperand(2); local 646 Result = selectAddESubE(Mips::SUBu, InFlag, InFlag.getOperand(0), DL, Node); 653 SDValue InFlag = Node->getOperand(2); local 654 Result = selectAddESubE(Mips::ADDu, InFlag, InFlag.getValue(0), DL, Node);
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H A D | MipsISelLowering.cpp | 2350 // The InFlag in necessary since all emitted instructions must be 2352 SDValue InFlag; local 2356 RegsToPass[i].second, InFlag); 2357 InFlag = Chain.getValue(1); 2381 if (InFlag.getNode()) 2382 Ops.push_back(InFlag); 2588 SDValue InFlag = Chain.getValue(1); local 2592 DAG.getIntPtrConstant(0, true), InFlag, DL); 2593 InFlag = Chain.getValue(1); 2597 return LowerCallResult(Chain, InFlag, CallCon 2604 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SDNode *CallNode, const Type *RetTy) const argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86SelectionDAGInfo.cpp | 82 SDValue InFlag; local 124 InFlag); 125 InFlag = Chain.getValue(1); 129 Chain = DAG.getCopyToReg(Chain, dl, X86::AL, Src, InFlag); 130 InFlag = Chain.getValue(1); 134 Count, InFlag); 135 InFlag = Chain.getValue(1); 137 Dst, InFlag); 138 InFlag = Chain.getValue(1); 141 SDValue Ops[] = { Chain, DAG.getValueType(AVT), InFlag }; 229 SDValue InFlag; local [all...] |
H A D | X86ISelDAGToDAG.cpp | 2228 SDValue InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, LoReg, local 2232 SDValue Ops[] = {N1, InFlag}; 2304 SDValue InFlag = CurDAG->getCopyToReg(CurDAG->getEntryNode(), dl, SrcReg, local 2311 InFlag }; 2318 InFlag = SDValue(CNode, 3); 2323 InFlag = SDValue(CNode, 1); 2329 SDValue Ops[] = { N1, InFlag }; 2335 InFlag = SDValue(CNode, 2); 2339 InFlag = SDValue(CNode, 0); 2347 X86::AX, MVT::i16, InFlag); 2440 SDValue InFlag; local [all...] |
H A D | X86ISelLowering.cpp | 2036 X86TargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, argument 2071 SDValue Ops[] = { Chain, InFlag }; 2084 CopyVT, InFlag).getValue(1); 2087 InFlag = Chain.getValue(2); 2863 SDValue InFlag; local 2866 RegsToPass[i].second, InFlag); 2867 InFlag = Chain.getValue(1); 2958 DAG.getIntPtrConstant(0, true), InFlag, dl); 2959 InFlag = Chain.getValue(1); 2980 if (InFlag [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 662 // flag operands which copy the outgoing args into registers. The InFlag in 664 SDValue InFlag; local 667 RegsToPass[i].second, InFlag); 668 InFlag = Chain.getValue(1); 691 if (InFlag.getNode()) 692 Ops.push_back(InFlag); 695 InFlag = Chain.getValue(1); 701 InFlag, dl); 702 InFlag = Chain.getValue(1); 706 return LowerCallResult(Chain, InFlag, CallCon 714 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 359 /// Chain/InFlag are the input chain/flag to use, and that TheCall is the call 363 HexagonTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, argument 384 RVLocs[i].getValVT(), InFlag).getValue(1); 385 InFlag = Chain.getValue(2); 535 // The InFlag in necessary since all emitted instructions must be 537 SDValue InFlag; local 541 RegsToPass[i].second, InFlag); 542 InFlag = Chain.getValue(1); 556 InFlag = SDValue(); 559 RegsToPass[i].second, InFlag); [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 899 SDValue InFlag(nullptr, 0); // Null incoming flag value. 901 InFlag).getValue(1); 1026 SDValue InFlag = N->getOperand(1); local 1028 N->getOperand(0), InFlag);
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H A D | PPCISelLowering.cpp | 3304 void PrepareTailCall(SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain, argument 3314 InFlag = SDValue(); 3326 DAG.getIntPtrConstant(0, true), InFlag, dl); 3327 InFlag = Chain.getValue(1); 3331 unsigned PrepareCall(SelectionDAG &DAG, SDValue &Callee, SDValue &InFlag, argument 3401 SDValue MTCTROps[] = {Chain, Callee, InFlag}; 3434 makeArrayRef(MTCTROps, InFlag.getNode() ? 3 : 2)); 3436 InFlag = LoadFuncPtr.getValue(2); 3444 InFlag); 3446 InFlag 3518 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument 3564 FinishCall(CallingConv::ID CallConv, SDLoc dl, bool isTailCall, bool isVarArg, SelectionDAG &DAG, SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue InFlag, SDValue Chain, SDValue &Callee, int SPDiff, unsigned NumBytes, const SmallVectorImpl<ISD::InputArg> &Ins, SmallVectorImpl<SDValue> &InVals) const argument 3893 SDValue InFlag; local 4340 SDValue InFlag; local 4732 SDValue InFlag; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1063 LowerCallResult(SDValue Chain, SDValue InFlag, argument 1073 InFlag).getValue(1); 1074 InFlag = Chain.getValue(2); 1188 // The InFlag in necessary since all emitted instructions must be 1190 SDValue InFlag; local 1193 RegsToPass[i].second, InFlag); 1194 InFlag = Chain.getValue(1); 1220 if (InFlag.getNode()) 1221 Ops.push_back(InFlag); 1224 InFlag [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 2695 SDValue InFlag = N->getOperand(4); local 2703 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; 2708 InFlag = SDValue(ResNode, 1); 2709 ReplaceUses(SDValue(N, 1), InFlag); local
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H A D | ARMISelLowering.cpp | 1250 ARMTargetLowering::LowerCallResult(SDValue Chain, SDValue InFlag, argument 1282 InFlag); 1284 InFlag = Lo.getValue(2); 1287 InFlag); 1289 InFlag = Hi.getValue(2); 1300 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); 1302 InFlag = Lo.getValue(2); 1304 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag); 1306 InFlag = Hi.getValue(2); 1315 InFlag); 1569 SDValue InFlag; local [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 677 SDValue InFlag = Chain.getValue(1); local 709 DAG.getConstant(sz, MVT::i32), InFlag }; 712 InFlag = Chain.getValue(1); 726 StVal, InFlag }; 731 InFlag = Chain.getValue(1); 747 DAG.getConstant(sz, MVT::i32), InFlag }; 750 InFlag = Chain.getValue(1); 770 InFlag }; 774 InFlag = Chain.getValue(1); 787 InFlag }; [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 883 // The InFlag in necessary since all emitted instructions must be 885 SDValue InFlag; local 888 Chain = DAG.getCopyToReg(Chain, dl, Reg, RegsToPass[i].second, InFlag); 889 InFlag = Chain.getValue(1); 925 if (InFlag.getNode()) 926 Ops.push_back(InFlag); 929 InFlag = Chain.getValue(1); 932 DAG.getIntPtrConstant(0, true), InFlag, dl); 933 InFlag = Chain.getValue(1); 945 RVLocs[i].getValVT(), InFlag) 1893 SDValue InFlag; local [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1914 SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, 1941 DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), InFlag); 1943 InFlag = Val.getValue(2); 2356 SDValue InFlag; local 2359 RegsToPass[i].second, InFlag); 2360 InFlag = Chain.getValue(1); 2399 DAG.getIntPtrConstant(0, true), InFlag, DL); 2400 InFlag = Chain.getValue(1); 2438 if (InFlag.getNode()) 2439 Ops.push_back(InFlag); 1913 LowerCallResult( SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc DL, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, bool isThisReturn, SDValue ThisVal) const argument [all...] |