| /external/llvm/lib/Target/R600/ |
| H A D | AMDGPUTargetMachine.h | 34 const InstrItineraryData *InstrItins; member in class:llvm::AMDGPUTargetMachine
60 return InstrItins;
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| H A D | AMDGPUSubtarget.h | 60 InstrItineraryData InstrItins; member in class:llvm::AMDGPUSubtarget
70 return InstrItins;
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| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| H A D | AMDGPUSubtarget.h | 40 InstrItineraryData InstrItins; member in class:llvm::AMDGPUSubtarget
46 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| H A D | AMDGPUTargetMachine.h | 37 const InstrItineraryData* InstrItins; member in class:llvm::AMDGPUTargetMachine
62 return InstrItins;
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| H A D | AMDGPUSubtarget.h | 40 InstrItineraryData InstrItins; member in class:llvm::AMDGPUSubtarget
46 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| H A D | AMDGPUTargetMachine.h | 37 const InstrItineraryData* InstrItins; member in class:llvm::AMDGPUTargetMachine
62 return InstrItins;
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ResourcePriorityQueue.h | 63 const InstrItineraryData* InstrItins; member in class:llvm::ResourcePriorityQueue
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| H A D | TargetSchedule.h | 36 InstrItineraryData InstrItins; member in class:llvm::TargetSchedModel
77 return &InstrItins;
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| H A D | DFAPacketizer.h | 46 const InstrItineraryData *InstrItins; member in class:llvm::DFAPacketizer
82 const InstrItineraryData *getInstrItins() const { return InstrItins; }
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ScheduleDAGSDNodes.h | 40 const InstrItineraryData *InstrItins; member in class:llvm::ScheduleDAGSDNodes
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| /external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonSubtarget.h | 53 InstrItineraryData InstrItins; member in class:llvm::HexagonSubtarget
61 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| /external/llvm/lib/CodeGen/ |
| H A D | PostRASchedulerList.cpp | 198 const InstrItineraryData *InstrItins = TM.getInstrItineraryData(); local
200 TM.getInstrInfo()->CreateTargetPostRAHazardRecognizer(InstrItins, this);
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| H A D | MachineLICM.cpp | 70 const InstrItineraryData *InstrItins; member in class:__anon25767::MachineLICM
333 InstrItins = TM->getInstrItineraryData();
1012 if (!InstrItins || InstrItins->isEmpty() || MRI->use_nodbg_empty(Reg))
1028 if (TII->hasHighOperandLatency(InstrItins, MRI, &MI, DefIdx, &UseMI, i))
1044 if (!InstrItins || InstrItins->isEmpty())
1058 if (!TII->hasLowDefLatency(InstrItins, &MI, i))
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| H A D | TwoAddressInstructionPass.cpp | 74 const InstrItineraryData *InstrItins; member in class:__anon25830::TwoAddressInstructionPass
792 if (TII->getInstrLatency(InstrItins, MI) > 1)
926 if (TII->getInstrLatency(InstrItins, &DefMI) > (Dist - DefDist))
1508 InstrItins = TM.getInstrItineraryData();
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 74 InstrItineraryData InstrItins; member in class:llvm::PPCSubtarget
146 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| /external/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.h | 136 InstrItineraryData InstrItins; member in class:llvm::MipsSubtarget
257 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| /external/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.h | 231 InstrItineraryData InstrItins; member in class:llvm::ARMSubtarget
447 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
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| /external/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.h | 214 InstrItineraryData InstrItins; member in class:llvm::final
467 const InstrItineraryData &getInstrItineraryData() const { return InstrItins; }
|