/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.h | 36 const MCInstrInfo &MCII; member in class:llvm::MipsMCCodeEmitter 44 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
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H A D | MipsMCCodeEmitter.cpp | 36 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII, argument 40 return new MipsMCCodeEmitter(MCII, Ctx, false); 43 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII, argument 47 return new MipsMCCodeEmitter(MCII, Ctx, true); 190 const MCInstrDesc &Desc = MCII.get(TmpInst.getOpcode());
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 73 static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, argument 77 return createSIMCCodeEmitter(MCII, STI, Ctx); 79 return createR600MCCodeEmitter(MCII, STI, Ctx);
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H A D | SIMCCodeEmitter.cpp | 62 const MCInstrInfo &MCII; member in class:__anon13912::SIMCCodeEmitter 69 : MCII(mcii), STI(sti), Ctx(ctx) { } 125 MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII, argument 128 return new SIMCCodeEmitter(MCII, STI, Ctx); 260 return MCII.get(MI.getOpcode()).TSFlags & SI_INSTR_FLAGS_ENCODING_MASK;
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H A D | R600MCCodeEmitter.cpp | 42 const MCInstrInfo &MCII; member in class:__anon13910::R600MCCodeEmitter 50 : MCII(mcii), STI(sti), Ctx(ctx) { } 144 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, argument 147 return new R600MCCodeEmitter(MCII, STI, Ctx); 195 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 333 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 676 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode());
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/external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 37 const MCInstrInfo &MCII; member in class:__anon26077::PPCMCCodeEmitter 43 : MCII(mcii), CTX(ctx), IsLittleEndian(isLittle) { 97 const MCInstrDesc &Desc = MCII.get(Opcode); 153 MCCodeEmitter *llvm::createPPCMCCodeEmitter(const MCInstrInfo &MCII, argument 159 return new PPCMCCodeEmitter(MCII, Ctx, IsLittleEndian);
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/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 74 static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, argument 79 return createSIMCCodeEmitter(MCII, MRI, STI, Ctx); 81 return createR600MCCodeEmitter(MCII, MRI, STI);
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H A D | SIMCCodeEmitter.cpp | 40 const MCInstrInfo &MCII; member in class:__anon26111::SIMCCodeEmitter 52 : MCII(mcii), MRI(mri) { } 69 MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII, argument 73 return new SIMCCodeEmitter(MCII, MRI, Ctx); 134 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 193 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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H A D | R600MCCodeEmitter.cpp | 35 const MCInstrInfo &MCII; member in class:__anon26110::R600MCCodeEmitter 41 : MCII(mcii), MRI(mri) { } 83 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, argument 86 return new R600MCCodeEmitter(MCII, MRI); 92 const MCInstrDesc &Desc = MCII.get(MI.getOpcode()); 175 if (HAS_NATIVE_OPERANDS(MCII.get(MI.getOpcode()).TSFlags))
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/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCCodeEmitter.cpp | 75 MCCodeEmitter *llvm::createSparcMCCodeEmitter(const MCInstrInfo &MCII, argument
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/external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCCodeEmitter.cpp | 27 const MCInstrInfo &MCII; member in class:__anon26148::SystemZMCCodeEmitter 32 : MCII(mcii), Ctx(ctx) { 95 MCCodeEmitter *llvm::createSystemZMCCodeEmitter(const MCInstrInfo &MCII, argument 99 return new SystemZMCCodeEmitter(MCII, Ctx); 107 unsigned Size = MCII.get(MI.getOpcode()).getSize();
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | AMDGPUMCTargetDesc.cpp | 73 static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, argument 77 return createSIMCCodeEmitter(MCII, STI, Ctx); 79 return createR600MCCodeEmitter(MCII, STI, Ctx);
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H A D | SIMCCodeEmitter.cpp | 62 const MCInstrInfo &MCII; member in class:__anon27323::SIMCCodeEmitter 69 : MCII(mcii), STI(sti), Ctx(ctx) { } 125 MCCodeEmitter *llvm::createSIMCCodeEmitter(const MCInstrInfo &MCII, argument 128 return new SIMCCodeEmitter(MCII, STI, Ctx); 260 return MCII.get(MI.getOpcode()).TSFlags & SI_INSTR_FLAGS_ENCODING_MASK;
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H A D | R600MCCodeEmitter.cpp | 42 const MCInstrInfo &MCII; member in class:__anon27321::R600MCCodeEmitter 50 : MCII(mcii), STI(sti), Ctx(ctx) { } 144 MCCodeEmitter *llvm::createR600MCCodeEmitter(const MCInstrInfo &MCII, argument 147 return new R600MCCodeEmitter(MCII, STI, Ctx); 195 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 333 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode()); 676 const MCInstrDesc &MCDesc = MCII.get(MI.getOpcode());
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/external/llvm/tools/llvm-mc/ |
H A D | llvm-mc.cpp | 323 MCInstrInfo &MCII, MCTargetOptions &MCOptions) { 327 TheTarget->createMCAsmParser(STI, *Parser, MCII, MCOptions)); 445 std::unique_ptr<MCInstrInfo> MCII(TheTarget->createMCInstrInfo()); 452 TheTarget->createMCInstPrinter(OutputAsmVariant, *MAI, *MCII, *MRI, *STI); 461 CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx); 472 MCCodeEmitter *CE = TheTarget->createMCCodeEmitter(*MCII, *MRI, *STI, Ctx); 487 *MCII, MCOptions); 320 AssembleInput(const char *ProgName, const Target *TheTarget, SourceMgr &SrcMgr, MCContext &Ctx, MCStreamer &Str, MCAsmInfo &MAI, MCSubtargetInfo &STI, MCInstrInfo &MCII, MCTargetOptions &MCOptions) argument
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/external/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCCodeEmitter.cpp | 206 MCCodeEmitter *llvm::createAArch64MCCodeEmitter(const MCInstrInfo &MCII, argument 210 return new AArch64MCCodeEmitter(MCII, STI, Ctx);
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 42 const MCInstrInfo &MCII; member in class:__anon25997::ARMMCCodeEmitter 48 : MCII(mcii), CTX(ctx), IsLittleEndian(IsLittle) { 420 MCCodeEmitter *llvm::createARMLEMCCodeEmitter(const MCInstrInfo &MCII, argument 424 return new ARMMCCodeEmitter(MCII, Ctx, true); 427 MCCodeEmitter *llvm::createARMBEMCCodeEmitter(const MCInstrInfo &MCII, argument 431 return new ARMMCCodeEmitter(MCII, Ctx, false); 1653 const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
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/external/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MCCodeEmitter.cpp | 35 const MCInstrInfo &MCII; member in class:__anon26176::X86MCCodeEmitter 39 : MCII(mcii), Ctx(ctx) { 172 MCCodeEmitter *llvm::createX86MCCodeEmitter(const MCInstrInfo &MCII, 176 return new X86MCCodeEmitter(MCII, Ctx); 1179 const MCInstrDesc &Desc = MCII.get(Opcode);
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