/external/llvm/lib/CodeGen/ |
H A D | BasicTargetTransformInfo.cpp | 513 EVT MemVT = getTLI()->getValueType(Src, true); local 514 if (MemVT.isSimple() && MemVT != MVT::Other) { 516 LA = getTLI()->getTruncStoreAction(LT.second, MemVT.getSimpleVT()); 518 LA = getTLI()->getLoadExtAction(ISD::EXTLOAD, MemVT.getSimpleVT());
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 374 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), local 380 MemVT, false, false, 0); 385 MemVT, ST->isVolatile(), 491 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), local 495 MemVT, LD->isVolatile(), 503 MachinePointerInfo(), MemVT, 1081 EVT MemVT = LD->getMemoryVT(); 1083 if (!TLI.allowsUnalignedMemoryAccesses(MemVT, AS)) { 3907 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8); 3909 MachinePointerInfo::getJumpTable(), MemVT, [all...] |
H A D | LegalizeIntegerTypes.cpp | 1870 EVT MemVT = N->getMemoryVT(); local 1873 MemVT, isVolatile, isNonTemporal, Alignment, TBAAInfo); 1918 EVT MemVT = N->getMemoryVT(); local 1919 unsigned EBytes = MemVT.getStoreSize(); 1926 MemVT.getSizeInBits() - ExcessBits),
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H A D | LegalizeVectorTypes.cpp | 2655 EVT MemVT((MVT::SimpleValueType) VT); 2656 unsigned MemVTWidth = MemVT.getSizeInBits(); 2657 if (MemVT.getSizeInBits() <= WidenEltWidth) 2659 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 && 2663 RetVT = MemVT; 2672 EVT MemVT = (MVT::SimpleValueType) VT; local 2673 unsigned MemVTWidth = MemVT.getSizeInBits(); 2674 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() && 2679 if (RetVT.getSizeInBits() < MemVTWidth || MemVT [all...] |
H A D | SelectionDAG.cpp | 4368 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, argument 4375 ID.AddInteger(MemVT.getRawBits()); 4394 dl.getDebugLoc(), VTList, MemVT, 4403 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, argument 4408 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering, 4413 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain, 4422 Alignment = getEVTAlignment(MemVT); 4433 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment); 4435 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO, 4439 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT, argument 4412 getAtomicCmpSwap( unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo, unsigned Alignment, AtomicOrdering SuccessOrdering, AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) argument 4455 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, const Value* PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4486 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4514 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 4540 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, ArrayRef<SDValue> Ops, EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align, bool Vol, bool ReadMem, bool WriteMem) argument 4563 getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList, ArrayRef<SDValue> Ops, EVT MemVT, MachineMemOperand *MMO) argument 4635 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument 4668 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) argument 4737 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo) argument 4749 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) argument [all...] |
H A D | DAGCombiner.cpp | 832 EVT MemVT = LD->getMemoryVT(); local 834 ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD 840 MemVT, LD->getMemOperand()); 1054 EVT MemVT = LD->getMemoryVT(); local 1056 ? (TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT) ? ISD::ZEXTLOAD 1061 MemVT, LD->getMemOperand()); 2835 EVT MemVT = LN0->getMemoryVT(); local 2840 BitWidth - MemVT.getScalarType().getSizeInBits())) && 2842 TLI.isLoadExtLegal(ISD::ZEXTLOAD, MemVT))) { 2845 MemVT, LN 2855 EVT MemVT = LN0->getMemoryVT(); local 5036 EVT MemVT = LN0->getMemoryVT(); local 5367 EVT MemVT = LN0->getMemoryVT(); local 5561 EVT MemVT = LN0->getMemoryVT(); local 9024 EVT MemVT = St->getMemoryVT(); local [all...] |
/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 2397 EVT MemVT = Mem->getMemoryVT(); local 2405 switch (MemVT.getSimpleVT().SimpleTy) { 2432 switch (MemVT.getSimpleVT().SimpleTy) { 2459 switch (MemVT.getSimpleVT().SimpleTy) {
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H A D | NVPTXISelLowering.cpp | 753 EVT MemVT = EltVT; local 773 MemVT, MachinePointerInfo()); 790 MemVT, MachinePointerInfo()); 810 unsigned PerStoreOffset = MemVT.getStoreSizeInBits() / 8 * VecSize; 864 MemVT, MachinePointerInfo()); 2823 EVT MemVT = Mem->getMemoryVT(); local 2824 if (MemVT != MVT::v2i8 && MemVT != MVT::v4i8) {
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/external/llvm/lib/Target/R600/ |
H A D | R600ISelLowering.cpp | 1359 EVT MemVT = StoreNode->getMemoryVT(); local 1361 if (MemVT == MVT::i8) { 1364 assert(MemVT == MVT::i16); 1387 Op->getVTList(), Args, MemVT, 1580 EVT MemVT = LoadNode->getMemoryVT(); local 1581 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8)); 1583 DAG.getConstant(VT.getSizeInBits() - MemVT.getSizeInBits(), MVT::i32); 1585 LoadNode->getPointerInfo(), MemVT, 1680 EVT MemVT = LocalIns[i].VT; local [all...] |
H A D | SIISelLowering.cpp | 288 SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, argument 299 MachinePointerInfo(UndefValue::get(PtrTy)), MemVT, 300 false, false, MemVT.getSizeInBits() >> 3); 402 EVT MemVT = Splits[i].VT; local 405 SDValue Arg = LowerParameter(DAG, VT, MemVT, DL, DAG.getRoot(), 852 EVT MemVT = Load->getMemoryVT(); local 854 assert(!MemVT.isVector() && "Private loads should be scalarized"); 855 assert(!MemVT.isFloatingPoint() && "FP loads should be promoted to int"); 868 if (MemVT.getSizeInBits() == 64) {
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H A D | AMDGPUISelLowering.cpp | 1042 EVT MemVT = Store->getMemoryVT(); local 1043 unsigned MemBits = MemVT.getSizeInBits(); 1048 if (!MemVT.isVector() || MemBits > 32) { 1057 EVT MemEltVT = MemVT.getVectorElementType(); 1059 unsigned MemNumElements = MemVT.getVectorNumElements(); 1060 unsigned PackedSize = MemVT.getStoreSizeInBits(); 1128 EVT MemVT = Load->getMemoryVT(); local 1137 MemVT, 1202 EVT MemEltVT = MemVT.getScalarType(); 1237 EVT MemVT local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 531 MVT MemVT; local 533 MemVT = DstVT; // FP_ROUND must use DstVT, we can't do a 'trunc load'. 535 MemVT = SrcIsSSE ? SrcVT : DstVT; 537 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT); 543 MemTmp, MachinePointerInfo(), MemVT, 547 MemVT, false, false, 0);
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/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 1191 EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, 1194 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1199 EVT MemVT, 1203 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1208 EVT MemVT, 1212 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1216 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, argument 1221 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1805 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, 1807 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MM 1190 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1198 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1207 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1803 LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, DebugLoc dl, SDValue *Operands, unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument 1841 LoadSDNode(SDValue *ChainPtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, MachineMemOperand *MMO) argument 1870 StoreSDNode(SDValue *ChainValuePtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, MachineMemOperand *MMO) argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 1487 EVT MemVT = EVT::getIntegerVT(*DAG.getContext(), EntrySize * 8); local 1489 MachinePointerInfo::getJumpTable(), MemVT, false, false, 2009 EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT(); local 2019 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, 2026 EVT MemVT = LD->getMemoryVT(); local 2031 // Return if load is aligned or if MemVT is neither i32 nor i64. 2032 if ((LD->getAlignment() >= MemVT.getSizeInBits() / 8) || 2033 ((MemVT != MVT::i32) && (MemVT != MVT::i64))) 2091 EVT MemVT local 2151 EVT MemVT = SD->getMemoryVT(); local [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2289 EVT MemVT = Node->getMemoryVT(); local 2290 if (MemVT == MVT::i32 || MemVT == MVT::i64) { 2292 assert(Op.getValueType() == MemVT && "Mismatched VTs"); 2302 NegSrc2 = DAG.getConstant(Value, MemVT); 2305 NegSrc2 = DAG.getNode(ISD::SUB, DL, MemVT, DAG.getConstant(0, MemVT), 2309 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT,
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1768 // For NON_EXTLOAD, generic code in getLoad assert(ValVT == MemVT) 1770 MVT MemVT = VA.getValVT(); local 1776 MemVT = VA.getLocVT(); 1791 MemVT, false, false, false, nullptr); 7377 EVT MemVT = LoadSDN->getMemoryVT(); local 7379 if (MemVT != VT.getVectorElementType()) 7434 MemVT,
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