/external/chromium_org/v8/src/arm64/ |
H A D | delayed-masm-arm64-inl.h | 23 void DelayedMasm::Mov(const Register& rd, function in class:v8::internal::DelayedMasm 28 __ Mov(rd, operand, discard_mode);
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H A D | macro-assembler-arm64-inl.h | 219 Mov(rd, -operand.ImmediateValue()); 290 Mov(rd, ~imm); 756 Mov(tmp, float_to_rawbits(imm)); 943 void MacroAssembler::Mov(const Register& rd, const Register& rn) { function in class:v8::internal::MacroAssembler 1290 Mov(root, Operand(roots_array_start)); 1500 Mov(tmp, Operand(handle));
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H A D | macro-assembler-arm64.cc | 90 Mov(rd, 0); 94 Mov(rd, rn); 106 Mov(rd, rn); 109 Mov(rd, immediate); 134 Mov(csp, temp); 161 void MacroAssembler::Mov(const Register& rd, uint64_t imm) { function in class:v8::internal::MacroAssembler 203 // Mov instructions can't move immediate values into the stack pointer, so 240 void MacroAssembler::Mov(const Register& rd, function in class:v8::internal::MacroAssembler 256 Mov(dst, operand.ImmediateValue()); 305 Mov(r [all...] |
/external/llvm/lib/Target/R600/ |
H A D | R600ExpandSpecialInstrs.cpp | 85 MachineInstr *Mov = TII->buildMovInstr(&MBB, I, local 90 int MovPredSelIdx = TII->getOperandIdx(Mov->getOpcode(), 93 Mov->getOperand(MovPredSelIdx).setReg(
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H A D | SIISelLowering.cpp | 1229 MachineSDNode *Mov = dyn_cast<MachineSDNode>(Operand); local 1232 if (!Mov || !TII->isMov(Mov->getMachineOpcode())) 1235 const SDValue &Op = Mov->getOperand(0);
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/external/vixl/src/a64/ |
H A D | macro-assembler-a64.cc | 144 Mov(rd, 0); 148 Mov(rd, rn); 160 Mov(rd, rn); 163 Mov(rd, immediate); 183 Mov(temp, immediate); 188 Mov(sp, temp); 214 void MacroAssembler::Mov(const Register& rd, function in class:vixl::MacroAssembler 220 Mov(rd, operand.immediate()); 258 // Emit two instructions for the extend case. This differs from Mov, as 272 void MacroAssembler::Mov(cons function in class:vixl::MacroAssembler [all...] |
H A D | macro-assembler-a64.h | 179 void Mov(const Register& rd, uint64_t imm); 180 void Mov(const Register& rd, 184 Mov(rd, (rd.size() == kXRegSize) ? ~imm : (~imm & kWRegMask)); 816 void Mov(const Register& rd, const Register& rn) { function in class:vixl::MacroAssembler
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/external/chromium_org/v8/test/cctest/ |
H A D | test-assembler-arm64.cc | 245 __ Mov(x29, csp); 248 __ Mov(x16, 0x1000); 249 __ Mov(csp, x16); 250 __ Mov(x0, csp); 254 __ Mov(x1, csp); 257 __ Mov(x17, 0xfff); 259 __ Mov(x2, csp); 263 __ Mov(x3, csp); 267 __ Mov(x4, csp); 271 __ Mov(w 9122 DCHECK(i < reg_count); int times = i % 4 + 1; if (i & 1) { if (i & 2) { __ PushMultipleTimes(w[i], times); } else { __ Mov(tmp.W(), times); __ PushMultipleTimes(w[i], tmp.W()); } for (int j = 0; j < times; j++) { if (w[i].Is(wzr)) { stack[active_w_slots++] = 0; } else { stack[active_w_slots++] = literal_base_w * i; } } } else { if (i & 2) { __ PushMultipleTimes(x[i], times); } else { __ Mov(tmp, times); __ PushMultipleTimes(x[i], tmp); } for (int j = 0; j < times; j++) { if (x[i].IsZero()) { stack[active_w_slots++] = 0; stack[active_w_slots++] = 0; } else { stack[active_w_slots++] = literal_base_hi * i; stack[active_w_slots++] = literal_base_lo * i; } } } } if (active_w_slots > requested_w_slots) { __ Drop(active_w_slots - requested_w_slots, kWRegSize); do { stack[active_w_slots--] = 0xdeadbeef; } while (active_w_slots > requested_w_slots); } Clobber(&masm, list); bool next_is_64 = !(reg_count & 1); for (int i = reg_count-1; i >= 0; i--) argument [all...] |
/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 750 MachineInstrBuilder Mov; local 768 Mov = BuildMI(MBB, I, I->getDebugLoc(), get(Opc), Dst).addReg(Src); 771 Mov.addReg(Src); 772 Mov = AddDefaultPred(Mov); 775 Mov = AddDefaultCC(Mov); 778 Mov->addRegisterDefined(DestReg, TRI); 780 Mov->addRegisterKilled(SrcReg, TRI);
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/external/valgrind/main/VEX/priv/ |
H A D | host_arm_defs.h | 658 } Mov; member in union:__anon31854::__anon31855 716 /* Mov src to dst on the given condition, which may not
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4924 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 4927 return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4933 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 4936 return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4942 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 4945 return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4951 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 4954 return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4960 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 4963 return DAG.getNode(ISD::BITCAST, dl, VT, Mov); 4969 SDValue Mov = DAG.getNode(AArch64ISD::BICi, dl, MovTy, LHS, local 5124 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5133 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5142 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5151 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5160 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5169 SDValue Mov = DAG.getNode(AArch64ISD::ORRi, dl, MovTy, LHS, local 5243 SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::v2i64, local 5249 SDValue Mov = DAG.getNode(AArch64ISD::MOVIedit, dl, MVT::f64, local 5257 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5266 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5275 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5284 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5293 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5302 SDValue Mov = DAG.getNode(AArch64ISD::MOVIshift, dl, MovTy, local 5311 SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, local 5320 SDValue Mov = DAG.getNode(AArch64ISD::MOVImsl, dl, MovTy, local 5329 SDValue Mov = DAG.getNode(AArch64ISD::MOVI, dl, MovTy, local 5338 SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MovTy, local 5346 SDValue Mov = DAG.getNode(AArch64ISD::FMOV, dl, MVT::v2f64, local 5356 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5365 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5374 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5383 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5392 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5401 SDValue Mov = DAG.getNode(AArch64ISD::MVNIshift, dl, MovTy, local 5410 SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, local 5419 SDValue Mov = DAG.getNode(AArch64ISD::MVNImsl, dl, MovTy, local [all...] |