Searched defs:NumOps (Results 1 - 25 of 44) sorted by relevance

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/external/llvm/include/llvm/IR/
H A DConstant.h47 Constant(Type *ty, ValueTy vty, Use *Ops, unsigned NumOps) argument
48 : User(ty, vty, Ops, NumOps) {}
H A DUser.h54 User(Type *ty, unsigned vty, Use *OpList, unsigned NumOps) argument
55 : Value(ty, vty), NumOperands(NumOps), OperandList(OpList) {}
H A DGlobalObject.h30 GlobalObject(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, argument
32 : GlobalValue(Ty, VTy, Ops, NumOps, Linkage, Name), ObjComdat(nullptr) {
H A DGlobalValue.h63 GlobalValue(Type *Ty, ValueTy VTy, Use *Ops, unsigned NumOps, argument
65 : Constant(Ty, VTy, Ops, NumOps), Linkage(Linkage),
H A DInlineAsm.h230 static unsigned getFlagWord(unsigned Kind, unsigned NumOps) { argument
231 assert(((NumOps << 3) & ~0xffff) == 0 && "Too many inline asm operands!");
233 return Kind | (NumOps << 3);
H A DConstants.h802 ConstantExpr(Type *ty, unsigned Opcode, Use *Ops, unsigned NumOps) argument
803 : Constant(ty, ConstantExprVal, Ops, NumOps) {
H A DInstrTypes.h38 Use *Ops, unsigned NumOps,
40 : Instruction(Ty, iType, Ops, NumOps, InsertBefore) {}
43 Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd)
44 : Instruction(Ty, iType, Ops, NumOps, InsertAtEnd) {}
37 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, Instruction *InsertBefore = nullptr) argument
42 TerminatorInst(Type *Ty, Instruction::TermOps iType, Use *Ops, unsigned NumOps, BasicBlock *InsertAtEnd) argument
/external/llvm/lib/CodeGen/
H A DCallingConvLower.cpp120 unsigned NumOps = Outs.size(); local
121 for (unsigned i = 0; i != NumOps; ++i) {
139 unsigned NumOps = ArgVTs.size(); local
140 for (unsigned i = 0; i != NumOps; ++i) {
H A DMachineRegisterInfo.cpp139 unsigned NumOps = MI->getNumOperands(); local
140 if (!(MO >= MO0 && MO < MO0+NumOps)) {
234 /// Move NumOps operands from Src to Dst, updating use-def lists as needed.
243 unsigned NumOps) {
244 assert(Src != Dst && NumOps && "Noop moveOperands");
248 if (Dst >= Src && Dst < Src + NumOps) {
250 Dst += NumOps - 1;
251 Src += NumOps - 1;
280 } while (--NumOps);
241 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps) argument
H A DTwoAddressInstructionPass.cpp435 for (unsigned i = 0, NumOps = MI.getNumOperands(); i != NumOps; ++i) {
1299 unsigned NumOps = MI->getNumOperands(); local
1301 for (unsigned SrcIdx = 0; SrcIdx < NumOps; ++SrcIdx) {
H A DMachineInstr.cpp555 if (unsigned NumOps = MCID->getNumOperands() +
557 CapOperands = OperandCapacity::get(NumOps);
618 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping
621 unsigned NumOps, MachineRegisterInfo *MRI) {
623 return MRI->moveOperands(Dst, Src, NumOps);
628 for (unsigned i = 0; i != NumOps; ++i)
631 for (unsigned i = NumOps; i ; --i)
949 unsigned NumOps;
951 i += NumOps) {
956 NumOps
620 moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps, MachineRegisterInfo *MRI) argument
1228 unsigned NumOps; local
[all...]
H A DMachineVerifier.cpp749 unsigned NumOps; local
750 for (unsigned e = MI->getNumOperands(); OpNo < e; OpNo += NumOps) {
755 NumOps = 1 + InlineAsm::getNumOperandRegisters(MO.getImm());
/external/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp136 unsigned NumOps = Outs.size(); local
146 for (; i != NumOps; ++i) {
164 unsigned NumOps = ArgVTs.size(); local
165 for (unsigned i = 0; i != NumOps; ++i) {
/external/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGSDNodes.cpp210 unsigned NumOps = Node->getNumOperands(); local
211 if (Node->getOperand(NumOps-1).getValueType() == MVT::Other)
212 Chain = Node->getOperand(NumOps-1).getNode();
H A DLegalizeTypes.cpp417 for (unsigned i = 0, NumOps = I->getNumOperands(); i < NumOps; ++i)
1009 unsigned NumOps = N->getNumOperands(); local
1011 if (NumOps == 0) {
1014 } else if (NumOps == 1) {
1018 } else if (NumOps == 2) {
1023 SmallVector<SDValue, 8> Ops(NumOps);
1024 for (unsigned i = 0; i < NumOps; ++i)
1028 &Ops[0], NumOps, isSigned, dl).first;
H A DScheduleDAGFast.cpp488 unsigned NumOps = Node->getNumOperands(); local
489 if (Node->getOperand(NumOps-1).getValueType() == MVT::Glue)
490 --NumOps; // Ignore the glue operand.
492 for (unsigned i = InlineAsm::Op_FirstOperand; i != NumOps;) {
676 unsigned NumOps = N->getNumOperands(); local
677 if (unsigned NumLeft = NumOps) {
683 if (NumLeft == NumOps && Op.getValueType() == MVT::Glue) {
/external/llvm/lib/IR/
H A DInstruction.cpp24 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
26 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
42 Instruction::Instruction(Type *ty, unsigned it, Use *Ops, unsigned NumOps, argument
44 : User(ty, Value::InstructionVal + it, Ops, NumOps), Parent(nullptr) {
/external/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp173 unsigned NumOps = Desc.getNumOperands(); local
174 if (NumOps) {
175 bool isTwoAddr = NumOps > 1 &&
180 for (unsigned e = NumOps; i != e; ++i) {
194 for (unsigned e = NumOps; i != e; ++i) {
206 for (; i != NumOps; ++i) {
224 if (NumOps > e && X86InstrInfo::isX86_64ExtendedReg(MI.getOperand(e)))
241 for (unsigned e = NumOps; i != e; ++i) {
838 unsigned NumOps = Desc->getNumOperands();
840 if (NumOps >
[all...]
/external/llvm/utils/TableGen/
H A DCodeGenInstruction.cpp71 unsigned NumOps = 1; local
91 NumOps = NumArgs;
116 OperandType, MIOperandNo, NumOps,
118 MIOperandNo += NumOps;
H A DDAGISelMatcherEmitter.cpp664 unsigned NumOps = P.getNumOperands(); local
667 ++NumOps; // Get the chained node too.
670 OS << " Result.resize(NextRes+" << NumOps << ");\n"; local
685 for (unsigned i = 0; i != NumOps; ++i)
H A DAsmWriterEmitter.cpp387 unsigned NumOps = NumInstOpsHandled[InstIdxs[i]]; local
388 assert(NumOps <= Inst->Operands.size() &&
391 Inst->Operands.begin()+NumOps);
/external/llvm/lib/Target/ARM/
H A DThumb2SizeReduction.cpp700 unsigned NumOps = MCID.getNumOperands(); local
701 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
702 if (HasCC && MI->getOperand(NumOps-1).isDead())
726 unsigned NumOps = MCID.getNumOperands(); local
728 if (i < NumOps && MCID.OpInfo[i].isOptionalDef())
796 unsigned NumOps = MCID.getNumOperands(); local
797 HasCC = (MI->getOperand(NumOps-1).getReg() == ARM::CPSR);
798 if (HasCC && MI->getOperand(NumOps-1).isDead())
822 unsigned NumOps = MCID.getNumOperands(); local
824 if (i < NumOps
[all...]
/external/llvm/lib/Target/SystemZ/
H A DSystemZInstrInfo.cpp663 unsigned NumOps = OldMI->getNumOperands(); local
664 for (unsigned I = 1; I < NumOps; ++I) {
682 unsigned NumOps = MI->getNumOperands(); local
712 for (unsigned I = 2; I < NumOps; ++I)
844 unsigned NumOps = MI->getNumExplicitOperands(); local
845 if (OpNum == NumOps - 1) {
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86MCCodeEmitter.cpp735 unsigned NumOps = Desc.getNumOperands(); local
885 unsigned RcOperand = NumOps-1;
1020 unsigned NumOps = MI.getNumOperands(); local
1022 bool isTwoAddr = NumOps > 1 &&
1027 for (; i != NumOps; ++i) {
1044 for (; i != NumOps; ++i) {
1056 for (; i != NumOps; ++i) {
1074 if (NumOps > e && MI.getOperand(e).isReg() &&
1093 for (unsigned e = NumOps; i != e; ++i) {
1186 unsigned NumOps local
[all...]
/external/llvm/lib/Transforms/Scalar/
H A DScalarizer.cpp565 unsigned NumOps = PHI.getNumOperands(); local
567 Res[I] = Builder.CreatePHI(VT->getElementType(), NumOps,
570 for (unsigned I = 0; I < NumOps; ++I) {

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