Searched defs:Reg (Results 1 - 25 of 253) sorted by relevance

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/external/llvm/lib/MC/
H A DMCRegisterInfo.cpp18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, argument
20 for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
21 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
26 unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const { argument
31 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
32 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
38 unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
42 const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
43 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
/external/llvm/include/llvm/MC/
H A DMCInstBuilder.h32 MCInstBuilder &addReg(unsigned Reg) { argument
33 Inst.addOperand(MCOperand::CreateReg(Reg));
H A DMCWin64EH.h36 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg) argument
37 : Operation(Op), Label(L), Offset(0), Register(Reg) {
43 MCWin64EHInstruction(OpType Op, MCSymbol *L, unsigned Reg, unsigned Off) argument
44 : Operation(Op), Label(L), Offset(Off), Register(Reg) {
/external/llvm/lib/CodeGen/
H A DAllocationOrder.h54 unsigned Reg = Order[Pos++]; local
55 if (!isHint(Reg))
56 return Reg;
H A DLivePhysRegs.cpp42 unsigned Reg = O->getReg(); local
43 if (Reg == 0)
45 removeReg(Reg);
54 unsigned Reg = O->getReg(); local
55 if (Reg == 0)
57 addReg(Reg);
70 unsigned Reg = O->getReg(); local
71 if (Reg == 0)
75 Defs.push_back(Reg);
80 removeReg(Reg);
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H A DDeadMachineInstructionElim.cpp70 unsigned Reg = MO.getReg(); local
71 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
73 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg))
76 if (!MRI->use_nodbg_empty(Reg))
131 unsigned Reg = MO.getReg(); local
132 if (!TargetRegisterInfo::isVirtualRegister(Reg))
134 MRI->markUsesInDebugValueAsUndef(Reg);
149 unsigned Reg = MO.getReg(); local
150 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
168 unsigned Reg = MO.getReg(); local
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H A DRegAllocBase.cpp75 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); local
76 if (MRI->reg_nodbg_empty(Reg))
78 enqueue(&LIS->getInterval(Reg));
H A DProcessImplicitDefs.cpp78 unsigned Reg = MI->getOperand(0).getReg(); local
80 if (TargetRegisterInfo::isVirtualRegister(Reg)) {
83 for (MachineOperand &MO : MRI->use_nodbg_operands(Reg)) {
107 !TRI->regsOverlap(Reg, UserReg))
109 // UserMI uses or redefines Reg. Set <undef> flags on all uses.
H A DCalcSpillWeights.cpp36 unsigned Reg = TargetRegisterInfo::index2VirtReg(i); local
37 if (MRI.reg_nodbg_empty(Reg))
39 VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg));
H A DCallingConvLower.cpp59 void CCState::MarkAllocated(unsigned Reg) { argument
60 for (MCRegAliasIterator AI(Reg, &TRI, true); AI.isValid(); ++AI)
H A DLiveRangeCalc.cpp40 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) { argument
43 // Visit all def operands. If the same instruction has multiple defs of Reg,
45 for (MachineOperand &MO : MRI->def_operands(Reg)) {
63 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg) { argument
66 // Visit all operands that read Reg. This may include partial defs.
67 for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
74 // MI is reading Reg. We may have visited MI before if it happens to be
75 // reading Reg multiple times. That is OK, extend() is idempotent.
83 // PHI operands are paired: (Reg, PredMBB).
101 extend(LR, Idx, Reg);
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H A DMachineCopyPropagation.cpp52 void SourceNoLongerAvailable(unsigned Reg,
66 MachineCopyPropagation::SourceNoLongerAvailable(unsigned Reg, argument
69 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
247 unsigned Reg = MO.getReg(); local
248 if (!Reg)
251 if (TargetRegisterInfo::isVirtualRegister(Reg))
256 Defs.push_back(Reg);
260 // If 'Reg' is defined by a copy, the copy is no longer a candidate
262 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
281 unsigned Reg local
300 unsigned Reg = Defs[i]; local
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/external/llvm/lib/Target/R600/
H A DSIMachineFunctionInfo.cpp88 unsigned Reg,
90 SpilledRegisters[FrameIndex] = SpilledReg(Reg, Lane);
87 addSpilledReg(unsigned FrameIndex, unsigned Reg, int Lane) argument
H A DSIRegisterInfo.cpp48 unsigned SIRegisterInfo::getHWRegIndex(unsigned Reg) const {
49 return getEncodingValue(Reg) & 0xff;
52 const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {
53 assert(!TargetRegisterInfo::isVirtualRegister(Reg));
65 if (BaseClass->contains(Reg)) {
122 unsigned SIRegisterInfo::getPhysRegSubReg(unsigned Reg, argument
125 unsigned Index = getHWRegIndex(Reg);
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCTargetDesc.h54 unsigned getFirstReg(unsigned Reg);
57 inline unsigned getRegAsGR64(unsigned Reg) { argument
58 return GR64Regs[getFirstReg(Reg)];
62 inline unsigned getRegAsGR32(unsigned Reg) { argument
63 return GR32Regs[getFirstReg(Reg)];
67 inline unsigned getRegAsGRH32(unsigned Reg) { argument
68 return GRH32Regs[getFirstReg(Reg)];
/external/llvm/lib/Target/XCore/
H A DXCoreFrameToArgsOffsetElim.cpp55 unsigned Reg = OldInst->getOperand(0).getReg(); local
56 MBBI = TII.loadImmediate(MBB, MBBI, Reg, StackSize);
/external/llvm/lib/Target/AArch64/
H A DAArch64DeadRegisterDefinitionsPass.cpp32 bool implicitlyDefinesOverlappingReg(unsigned Reg, const MachineInstr &MI);
52 unsigned Reg, const MachineInstr &MI) {
55 if (TRI->regsOverlap(Reg, MO.getReg()))
51 implicitlyDefinesOverlappingReg( unsigned Reg, const MachineInstr &MI) argument
/external/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.h38 static inline bool isARMArea1Register(unsigned Reg, bool isIOS) { argument
40 switch (Reg) {
53 static inline bool isARMArea2Register(unsigned Reg, bool isIOS) { argument
55 switch (Reg) {
64 static inline bool isARMArea3Register(unsigned Reg, bool isIOS) { argument
66 switch (Reg) {
75 static inline bool isCalleeSavedRegister(unsigned Reg, argument
78 if (Reg == CSRegs[i])
138 void UpdateRegAllocHint(unsigned Reg, unsigned NewReg,
164 bool isLowRegister(unsigned Reg) cons
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/external/llvm/lib/Target/Sparc/
H A DSparcMachineFunctionInfo.h43 void setGlobalBaseReg(unsigned Reg) { GlobalBaseReg = Reg; } argument
49 void setSRetReturnReg(unsigned Reg) { SRetReturnReg = Reg; } argument
/external/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp78 unsigned Reg = MI.getOperand(0).getReg(); local
79 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
80 unsigned GPRs = GPRMap[Reg];
88 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
93 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
110 unsigned Reg = *LI;
111 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
112 LiveLow |= LowGPRs[Reg];
113 LiveHigh |= HighGPRs[Reg];
133 if (unsigned Reg
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/external/llvm/include/llvm/CodeGen/
H A DLivePhysRegs.h74 void addReg(unsigned Reg) { argument
76 assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
77 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
84 void removeReg(unsigned Reg) { argument
86 assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
87 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true);
90 for (MCSuperRegIterator SuperRegs(Reg, TRI, /*IncludeSelf=*/false);
98 /// \brief Returns true if register @p Reg is contained in the set. This also
99 /// works if only the super register of @p Reg has been defined, because we
101 bool contains(unsigned Reg) cons
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H A DLiveVariables.h106 /// isLiveIn - Is Reg live in to MBB? This means that Reg is live through
107 /// MBB, or it is killed in MBB. If Reg is only used by PHI instructions in
110 unsigned Reg,
150 /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
153 bool HandlePhysRegKill(unsigned Reg, MachineInstr *MI);
158 void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
159 void HandlePhysRegDef(unsigned Reg, MachineInstr *MI,
165 MachineInstr *FindLastRefOrPartRef(unsigned Reg);
170 MachineInstr *FindLastPartialDef(unsigned Reg,
281 isLiveIn(unsigned Reg, const MachineBasicBlock &MBB) argument
299 isPHIJoin(unsigned Reg) argument
302 setPHIJoin(unsigned Reg) argument
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H A DRegisterScavenging.h45 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
52 unsigned Reg; member in struct:llvm::RegScavenger::ScavengedInfo
162 void setUsed(unsigned Reg);
165 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
171 bool isUsed(unsigned Reg, bool CheckReserved = true) const { argument
172 return !RegsAvailable.test(Reg) || (CheckReserved && isReserved(Reg));
175 /// isAliasUsed - Is Reg or an alias currently in use?
176 bool isAliasUsed(unsigned Reg) cons
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/external/llvm/lib/Target/X86/
H A DX86FloatingPoint.cpp1 //===-- X86FloatingPoint.cpp - Floating point Reg -> Stack converter ------===//
119 unsigned Reg = *I; local
120 if (Reg < X86::FP0 || Reg > X86::FP6)
122 Mask |= 1 << (Reg - X86::FP0);
229 void pushReg(unsigned Reg) {
230 assert(Reg < NumFPRegs && "Register number out of range!");
233 Stack[StackTop] = Reg;
234 RegMap[Reg] = StackTop++;
290 void freeStackSlotAfter(MachineBasicBlock::iterator &I, unsigned Reg);
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/external/qemu/target-i386/
H A Dops_sse_header.h20 #define Reg MMXReg macro
23 #define Reg XMMReg macro
30 #define dh_ctype_Reg Reg *
37 DEF_HELPER_3(glue(psrlw, SUFFIX), void, env, Reg, Reg) variable
38 DEF_HELPER_3(glue(psraw, SUFFIX), void, env, Reg, Reg) variable
39 DEF_HELPER_3(glue(psllw, SUFFIX), void, env, Reg, Reg) variable
40 DEF_HELPER_3(glue(psrld, SUFFIX), void, env, Reg, Re variable
41 DEF_HELPER_3(glue(psrad, SUFFIX), void, env, Reg, Reg) variable
42 DEF_HELPER_3(glue(pslld, SUFFIX), void, env, Reg, Reg) variable
43 DEF_HELPER_3(glue(psrlq, SUFFIX), void, env, Reg, Reg) variable
44 DEF_HELPER_3(glue(psllq, SUFFIX), void, env, Reg, Reg) variable
47 DEF_HELPER_3(glue(psrldq, SUFFIX), void, env, Reg, Reg) variable
48 DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg) variable
112 DEF_HELPER_3(glue(pmuludq, SUFFIX), void, env, Reg, Reg) variable
113 DEF_HELPER_3(glue(pmaddwd, SUFFIX), void, env, Reg, Reg) variable
115 DEF_HELPER_3(glue(psadbw, SUFFIX), void, env, Reg, Reg) variable
116 DEF_HELPER_4(glue(maskmov, SUFFIX), void, env, Reg, Reg, tl) variable
117 DEF_HELPER_2(glue(movl_mm_T0, SUFFIX), void, Reg, i32) variable
119 DEF_HELPER_2(glue(movq_mm_T0, SUFFIX), void, Reg, i64) variable
123 DEF_HELPER_3(glue(pshufw, SUFFIX), void, Reg, Reg, int) variable
228 DEF_HELPER_3(glue(packsswb, SUFFIX), void, env, Reg, Reg) variable
229 DEF_HELPER_3(glue(packuswb, SUFFIX), void, env, Reg, Reg) variable
230 DEF_HELPER_3(glue(packssdw, SUFFIX), void, env, Reg, Reg) variable
240 DEF_HELPER_3(glue(punpcklqdq, SUFFIX), void, env, Reg, Reg) variable
241 DEF_HELPER_3(glue(punpckhqdq, SUFFIX), void, env, Reg, Reg) variable
268 DEF_HELPER_3(glue(phaddw, SUFFIX), void, env, Reg, Reg) variable
269 DEF_HELPER_3(glue(phaddd, SUFFIX), void, env, Reg, Reg) variable
270 DEF_HELPER_3(glue(phaddsw, SUFFIX), void, env, Reg, Reg) variable
271 DEF_HELPER_3(glue(phsubw, SUFFIX), void, env, Reg, Reg) variable
272 DEF_HELPER_3(glue(phsubd, SUFFIX), void, env, Reg, Reg) variable
273 DEF_HELPER_3(glue(phsubsw, SUFFIX), void, env, Reg, Reg) variable
274 DEF_HELPER_3(glue(pabsb, SUFFIX), void, env, Reg, Reg) variable
275 DEF_HELPER_3(glue(pabsw, SUFFIX), void, env, Reg, Reg) variable
276 DEF_HELPER_3(glue(pabsd, SUFFIX), void, env, Reg, Reg) variable
277 DEF_HELPER_3(glue(pmaddubsw, SUFFIX), void, env, Reg, Reg) variable
278 DEF_HELPER_3(glue(pmulhrsw, SUFFIX), void, env, Reg, Reg) variable
279 DEF_HELPER_3(glue(pshufb, SUFFIX), void, env, Reg, Reg) variable
280 DEF_HELPER_3(glue(psignb, SUFFIX), void, env, Reg, Reg) variable
281 DEF_HELPER_3(glue(psignw, SUFFIX), void, env, Reg, Reg) variable
282 DEF_HELPER_3(glue(psignd, SUFFIX), void, env, Reg, Reg) variable
283 DEF_HELPER_4(glue(palignr, SUFFIX), void, env, Reg, Reg, s32) variable
287 DEF_HELPER_3(glue(pblendvb, SUFFIX), void, env, Reg, Reg) variable
288 DEF_HELPER_3(glue(blendvps, SUFFIX), void, env, Reg, Reg) variable
289 DEF_HELPER_3(glue(blendvpd, SUFFIX), void, env, Reg, Reg) variable
290 DEF_HELPER_3(glue(ptest, SUFFIX), void, env, Reg, Reg) variable
291 DEF_HELPER_3(glue(pmovsxbw, SUFFIX), void, env, Reg, Reg) variable
292 DEF_HELPER_3(glue(pmovsxbd, SUFFIX), void, env, Reg, Reg) variable
293 DEF_HELPER_3(glue(pmovsxbq, SUFFIX), void, env, Reg, Reg) variable
294 DEF_HELPER_3(glue(pmovsxwd, SUFFIX), void, env, Reg, Reg) variable
295 DEF_HELPER_3(glue(pmovsxwq, SUFFIX), void, env, Reg, Reg) variable
296 DEF_HELPER_3(glue(pmovsxdq, SUFFIX), void, env, Reg, Reg) variable
297 DEF_HELPER_3(glue(pmovzxbw, SUFFIX), void, env, Reg, Reg) variable
298 DEF_HELPER_3(glue(pmovzxbd, SUFFIX), void, env, Reg, Reg) variable
299 DEF_HELPER_3(glue(pmovzxbq, SUFFIX), void, env, Reg, Reg) variable
300 DEF_HELPER_3(glue(pmovzxwd, SUFFIX), void, env, Reg, Reg) variable
301 DEF_HELPER_3(glue(pmovzxwq, SUFFIX), void, env, Reg, Reg) variable
302 DEF_HELPER_3(glue(pmovzxdq, SUFFIX), void, env, Reg, Reg) variable
303 DEF_HELPER_3(glue(pmuldq, SUFFIX), void, env, Reg, Reg) variable
304 DEF_HELPER_3(glue(pcmpeqq, SUFFIX), void, env, Reg, Reg) variable
305 DEF_HELPER_3(glue(packusdw, SUFFIX), void, env, Reg, Reg) variable
306 DEF_HELPER_3(glue(pminsb, SUFFIX), void, env, Reg, Reg) variable
307 DEF_HELPER_3(glue(pminsd, SUFFIX), void, env, Reg, Reg) variable
308 DEF_HELPER_3(glue(pminuw, SUFFIX), void, env, Reg, Reg) variable
309 DEF_HELPER_3(glue(pminud, SUFFIX), void, env, Reg, Reg) variable
310 DEF_HELPER_3(glue(pmaxsb, SUFFIX), void, env, Reg, Reg) variable
311 DEF_HELPER_3(glue(pmaxsd, SUFFIX), void, env, Reg, Reg) variable
312 DEF_HELPER_3(glue(pmaxuw, SUFFIX), void, env, Reg, Reg) variable
313 DEF_HELPER_3(glue(pmaxud, SUFFIX), void, env, Reg, Reg) variable
314 DEF_HELPER_3(glue(pmulld, SUFFIX), void, env, Reg, Reg) variable
315 DEF_HELPER_3(glue(phminposuw, SUFFIX), void, env, Reg, Reg) variable
316 DEF_HELPER_4(glue(roundps, SUFFIX), void, env, Reg, Reg, i32) variable
317 DEF_HELPER_4(glue(roundpd, SUFFIX), void, env, Reg, Reg, i32) variable
318 DEF_HELPER_4(glue(roundss, SUFFIX), void, env, Reg, Reg, i32) variable
319 DEF_HELPER_4(glue(roundsd, SUFFIX), void, env, Reg, Reg, i32) variable
320 DEF_HELPER_4(glue(blendps, SUFFIX), void, env, Reg, Reg, i32) variable
321 DEF_HELPER_4(glue(blendpd, SUFFIX), void, env, Reg, Reg, i32) variable
322 DEF_HELPER_4(glue(pblendw, SUFFIX), void, env, Reg, Reg, i32) variable
323 DEF_HELPER_4(glue(dpps, SUFFIX), void, env, Reg, Reg, i32) variable
324 DEF_HELPER_4(glue(dppd, SUFFIX), void, env, Reg, Reg, i32) variable
325 DEF_HELPER_4(glue(mpsadbw, SUFFIX), void, env, Reg, Reg, i32) variable
330 DEF_HELPER_3(glue(pcmpgtq, SUFFIX), void, env, Reg, Reg) variable
331 DEF_HELPER_4(glue(pcmpestri, SUFFIX), void, env, Reg, Reg, i32) variable
332 DEF_HELPER_4(glue(pcmpestrm, SUFFIX), void, env, Reg, Reg, i32) variable
333 DEF_HELPER_4(glue(pcmpistri, SUFFIX), void, env, Reg, Reg, i32) variable
334 DEF_HELPER_4(glue(pcmpistrm, SUFFIX), void, env, Reg, Reg, i32) variable
341 DEF_HELPER_3(glue(aesdec, SUFFIX), void, env, Reg, Reg) variable
342 DEF_HELPER_3(glue(aesdeclast, SUFFIX), void, env, Reg, Reg) variable
343 DEF_HELPER_3(glue(aesenc, SUFFIX), void, env, Reg, Reg) variable
344 DEF_HELPER_3(glue(aesenclast, SUFFIX), void, env, Reg, Reg) variable
345 DEF_HELPER_3(glue(aesimc, SUFFIX), void, env, Reg, Reg) variable
346 DEF_HELPER_4(glue(aeskeygenassist, SUFFIX), void, env, Reg, Reg, i32) variable
347 DEF_HELPER_4(glue(pclmulqdq, SUFFIX), void, env, Reg, Reg, i32) variable
351 #undef Reg macro
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