Searched defs:ShiftTy (Results 1 - 5 of 5) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 2107 EVT ShiftTy = TLI.getShiftAmountTy(VT); local 2108 assert(ShiftTy.getScalarType().getSizeInBits() >= 2111 if (ShiftOp.getValueType() != ShiftTy) 2112 ShiftOp = DAG.getZExtOrTrunc(ShiftOp, dl, ShiftTy);
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H A D | TargetLowering.cpp | 1643 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1650 DAG.getConstant(AndRHS->getAPIntValue().logBase2(), ShiftTy))); 1658 DAG.getConstant(C1.logBase2(), ShiftTy))); 1673 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1677 DAG.getConstant(ShiftBits, ShiftTy)); 1701 EVT ShiftTy = DCI.isBeforeLegalize() ? local 1705 DAG.getConstant(ShiftBits, ShiftTy));
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 165 bool SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy); 2753 ARM_AM::ShiftOpc ShiftTy) { 2796 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, ShiftImm)); 2799 MIB.addImm(ARM_AM::getSORegOpc(ShiftTy, 0)); 2752 SelectShift(const Instruction *I, ARM_AM::ShiftOpc ShiftTy) argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 794 EVT ShiftTy, SelectionDAG &DAG) { 809 DAG.getConstant(Log2_64(C), ShiftTy)); 819 SDValue Op0 = genConstMult(X, Floor, DL, VT, ShiftTy, DAG); 820 SDValue Op1 = genConstMult(X, C - Floor, DL, VT, ShiftTy, DAG); 826 SDValue Op0 = genConstMult(X, Ceil, DL, VT, ShiftTy, DAG); 827 SDValue Op1 = genConstMult(X, Ceil - C, DL, VT, ShiftTy, DAG); 793 genConstMult(SDValue X, uint64_t C, SDLoc DL, EVT VT, EVT ShiftTy, SelectionDAG &DAG) argument
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 480 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon25988::ARMOperand::PostIdxRegOp 490 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon25988::ARMOperand::RegShiftedRegOp 497 ARM_AM::ShiftOpc ShiftTy; member in struct:__anon25988::ARMOperand::RegShiftedImmOp 1080 return Kind == k_PostIndexRegister && PostIdxReg.ShiftTy ==ARM_AM::no_shift; 1201 return PostIdxReg.ShiftTy == ARM_AM::no_shift; 1752 ARM_AM::getSORegOpc(RegShiftedReg.ShiftTy, RegShiftedReg.ShiftImm))); 1763 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm))); 2328 PostIdxReg.ShiftTy); 2543 Op->RegShiftedReg.ShiftTy = ShTy; 2556 Op->RegShiftedImm.ShiftTy 2693 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, unsigned ShiftImm, SMLoc S, SMLoc E) argument 2944 ARM_AM::ShiftOpc ShiftTy = StringSwitch<ARM_AM::ShiftOpc>(lowerCase) local 4294 ARM_AM::ShiftOpc ShiftTy = ARM_AM::no_shift; local 7426 ARM_AM::ShiftOpc ShiftTy; local 7451 ARM_AM::ShiftOpc ShiftTy; local [all...] |
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