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Searched defs:SubReg0 (Results 1 - 4 of 4) sorted by relevance

/external/llvm/lib/Target/AArch64/
H A D	AArch64AdvSIMDScalarPass.cpp	`196 unsigned Src0 = 0, SubReg0; local 202 Src0 = getSrcFromCopy(&Def, MRI, SubReg0); 289 unsigned Src0 = 0, SubReg0; local 295 Src0 = getSrcFromCopy(&Def, MRI, SubReg0); 320 SubReg0 = 0; 339 .addReg(Src0, getKillRegState(true), SubReg0)`
/external/llvm/lib/CodeGen/
H A D	TargetInstrInfo.cpp	`139 unsigned SubReg0 = HasDef ? MI->getOperand(0).getSubReg() : 0; local 150 SubReg0 = SubReg2; 155 SubReg0 = SubReg1; 166 MI->getOperand(0).setSubReg(SubReg0);`
/external/llvm/lib/Target/R600/
H A D	AMDGPUISelDAGToDAG.cpp	`337 SDValue RC, SubReg0, SubReg1; local 343 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0_sub1, MVT::i32); 347 SubReg0 = CurDAG->getTargetConstant(AMDGPU::sub0, MVT::i32); 352 const SDValue Ops[] = { RC, N->getOperand(0), SubReg0,`
/external/llvm/lib/Target/ARM/
H A D	ARMISelDAGToDAG.cpp	1568 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::gsub_0, MVT::i32); local 1570 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1579 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); local 1581 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1589 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); local 1591 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1599 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, MVT::i32); local 1601 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; 1611 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::ssub_0, MVT::i32); local 1615 const SDValue Ops[] = { RegClass, V0, SubReg0, V 1625 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::dsub_0, MVT::i32); local 1639 SDValue SubReg0 = CurDAG->getTargetConstant(ARM::qsub_0, MVT::i32); local [all...]

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