Searched defs:SuperRC (Results 1 - 6 of 6) sorted by relevance

/external/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp994 const TargetRegisterClass *SuperRC = TRI->getRegClass(i); local
996 if (SuperRC->getSize() <= BestRC->getSize())
998 if (!isLegalRC(SuperRC))
1000 BestRC = SuperRC;
H A DMachineVerifier.cpp933 const TargetRegisterClass *SuperRC = local
935 if (!SuperRC) {
939 DRC = TRI->getMatchingSuperRegClass(SuperRC, DRC, SubIdx);
H A DRegAllocGreedy.cpp1494 /// on \p MI and that are also in \p SuperRC.
1496 const MachineInstr *MI, unsigned Reg, const TargetRegisterClass *SuperRC,
1499 assert(SuperRC && "Invalid register class");
1502 MI->getRegClassConstraintEffectForVReg(Reg, SuperRC, TII, TRI,
1535 const TargetRegisterClass *SuperRC = TRI->getLargestLegalSuperClass(CurRC); local
1536 unsigned SuperRCNumAllocatableRegs = RCI.getNumAllocatableRegs(SuperRC);
1545 getNumAllocatableRegsForConstraints(MI, VirtReg.reg, SuperRC, TII,
1495 getNumAllocatableRegsForConstraints( const MachineInstr *MI, unsigned Reg, const TargetRegisterClass *SuperRC, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, const RegisterClassInfo &RCI) argument
/external/llvm/lib/Target/R600/
H A DAMDGPUISelDAGToDAG.cpp140 const TargetRegisterClass *SuperRC = TM.getRegisterInfo()->getRegClass(RCID); local
144 return TM.getRegisterInfo()->getSubClassWithSubReg(SuperRC, SubRegIdx);
H A DSIInstrInfo.cpp781 const TargetRegisterClass *SuperRC,
787 unsigned NewSuperReg = MRI.createVirtualRegister(SuperRC);
808 const TargetRegisterClass *SuperRC,
821 unsigned SubReg = buildExtractSubReg(MII, MRI, Op, SuperRC,
778 buildExtractSubReg(MachineBasicBlock::iterator MI, MachineRegisterInfo &MRI, MachineOperand &SuperReg, const TargetRegisterClass *SuperRC, unsigned SubIdx, const TargetRegisterClass *SubRC) const argument
804 buildExtractSubRegOrImm( MachineBasicBlock::iterator MII, MachineRegisterInfo &MRI, MachineOperand &Op, const TargetRegisterClass *SuperRC, unsigned SubIdx, const TargetRegisterClass *SubRC) const argument
/external/llvm/utils/TableGen/
H A DCodeGenRegisters.h263 // classes SuperRC such that:
265 // R:SubRegIndex in this RC for all R in SuperRC.
333 CodeGenRegisterClass *SuperRC) {
334 SuperRegClasses[SubIdx].insert(SuperRC);
332 addSuperRegClass(CodeGenSubRegIndex *SubIdx, CodeGenRegisterClass *SuperRC) argument

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