Searched defs:VT1 (Results 1 - 10 of 10) sorted by relevance

/external/llvm/include/llvm/IR/
H A DLegacyPassNameParser.h92 static int ValLessThan(const PassNameParser::OptionInfo *VT1, argument
94 return std::strcmp(VT1->Name, VT2->Name);
/external/kernel-headers/original/uapi/asm-generic/
H A Dtermbits.h106 #define VT1 0040000 macro
/external/kernel-headers/original/uapi/asm-mips/asm/
H A Dtermbits.h126 #define VT1 0040000 macro
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp1171 bool MSP430TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { argument
1172 if (!VT1.isInteger() || !VT2.isInteger())
1175 return (VT1.getSizeInBits() > VT2.getSizeInBits());
1183 bool MSP430TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { argument
1185 return 0 && VT1 == MVT::i8 && VT2 == MVT::i16;
/external/llvm/include/llvm/Target/
H A DTargetLowering.h682 EVT VT1; local
685 (void)getVectorTypeBreakdown(Context, VT, VT1,
710 EVT VT1; local
713 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2);
1315 virtual bool isTruncateFree(EVT /*VT1*/, EVT /*VT2*/) const {
1331 virtual bool isZExtFree(EVT /*VT1*/, EVT /*VT2*/) const {
1399 /// Return true if it's profitable to narrow operations of type VT1 to
1402 virtual bool isNarrowingProfitable(EVT /*VT1*/, EVT /*VT2*/) const {
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1498 bool HexagonTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { argument
1499 if (!VT1.isSimple() || !VT2.isSimple()) {
1502 return ((VT1.getSimpleVT() == MVT::i64) && (VT2.getSimpleVT() == MVT::i32));
/external/llvm/lib/Transforms/Vectorize/
H A DBBVectorize.cpp1038 Type *VT1 = getVecTypeForPair(IT1, JT1), local
1082 unsigned VCost = getInstrCost(I->getOpcode(), VT1, VT2, Op1VK, Op2VK);
1090 unsigned VParts1 = TTI->getNumberOfParts(VT1),
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp1775 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) { argument
1776 unsigned Bytes = std::max(VT1.getStoreSizeInBits(),
1778 Type *Ty1 = VT1.getTypeForEVT(*getContext());
5124 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) { argument
5127 ID.AddInteger(VT1.getRawBits());
5134 Array[0] = VT1;
5142 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) { argument
5145 ID.AddInteger(VT1.getRawBits());
5153 Array[0] = VT1;
5162 SDVTList SelectionDAG::getVTList(EVT VT1, EV argument
5369 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) argument
5375 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2) argument
5381 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, ArrayRef<SDValue> Ops) argument
5388 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, EVT VT4, ArrayRef<SDValue> Ops) argument
5395 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1) argument
5403 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) argument
5411 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument
5420 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument
5589 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) argument
5595 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1) argument
5603 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) argument
5611 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, SDValue Op1, SDValue Op2, SDValue Op3) argument
5620 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) argument
5628 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2) argument
5637 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, SDValue Op1, SDValue Op2, SDValue Op3) argument
5646 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, ArrayRef<SDValue> Ops) argument
5654 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2, EVT VT3, EVT VT4, ArrayRef<SDValue> Ops) argument
[all...]
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp6086 bool AArch64TargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { argument
6087 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
6089 unsigned NumBits1 = VT1.getSizeInBits();
6103 bool AArch64TargetLowering::isZExtFree(EVT VT1, EVT VT2) const { argument
6104 if (VT1.isVector() || VT2.isVector() || !VT1.isInteger() || !VT2.isInteger())
6106 unsigned NumBits1 = VT1.getSizeInBits();
6112 EVT VT1 = Val.getValueType(); local
6113 if (isZExtFree(VT1, VT
[all...]
/external/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8918 bool PPCTargetLowering::isTruncateFree(EVT VT1, EVT VT2) const { argument
8919 if (!VT1.isInteger() || !VT2.isInteger())
8921 unsigned NumBits1 = VT1.getSizeInBits();

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