Searched defs:crm (Results 1 - 5 of 5) sorted by relevance

/external/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1524 uint64_t crm = fieldFromInstruction(insn, 8, 4); local
1529 Inst.addOperand(MCOperand::CreateImm(crm));
/external/qemu/target-arm/
H A Dhelper.c1444 int crm; local
1448 crm = insn & 0xf;
1457 && op1 == 2 && crm == 0 && op2 == 0) {
1463 switch (crm) {
1590 if (crm >= 8)
1592 env->cp15.c6_region[crm] = val;
1617 switch (crm) {
1680 switch (crm) {
1796 if (!op1 && !crm) {
1843 if (op2 == 0 && crm
1891 int crm; local
[all...]
H A Dcpu.h472 #define ENCODE_CP_REG(cp, is64, crn, crm, opc1, opc2) \
474 ((crm) << 7) | ((opc1) << 3) | (opc2))
510 * same (cp, is64, crn, crm, opc1, opc2) tuple: either the new or the
603 /* Location of register: coprocessor number and (crn,crm,opc1,opc2)
604 * tuple. Any of crm, opc1 and opc2 may be CP_ANY to indicate a
607 * callbacks will be passed an ARMCPRegInfo with the crn/crm/opc1/opc2
610 * For 64 bit registers, only crm and opc1 are relevant; crn and opc2
615 uint8_t crm; member in struct:ARMCPRegInfo
H A Dtranslate.c6239 int crm = insn & 0xf; local
6247 switch (crm) {
6274 if (op1 == 6 && crn == 0 && crm == 0 && op2 == 0) {
6282 if (op1 == 6 && crn == 1 && crm == 0 && op2 == 0) {
6291 fprintf(stderr, "Unknown cp14 read op1:%d crn:%d crm:%d op2:%d\n",
6292 op1, crn, crm, op2);
6299 int crm = insn & 0xf; local
6307 switch (crm) {
6330 if (op1 == 6 && crn == 0 && crm == 0 && op2 == 0) {
6339 if (op1 == 6 && crn == 1 && crm
[all...]
/external/chromium_org/v8/src/arm/
H A Dassembler-arm.cc2043 CRegister crm,
2048 crd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | crm.code());
2056 CRegister crm,
2058 cdp(coproc, opcode_1, crd, crn, crm, opcode_2, kSpecialCondition);
2066 CRegister crm,
2071 rd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | B4 | crm.code());
2079 CRegister crm,
2081 mcr(coproc, opcode_1, rd, crn, crm, opcode_2, kSpecialCondition);
2089 CRegister crm,
2094 rd.code()*B12 | coproc*B8 | (opcode_2 & 7)*B5 | B4 | crm
2039 cdp(Coprocessor coproc, int opcode_1, CRegister crd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2052 cdp2(Coprocessor coproc, int opcode_1, CRegister crd, CRegister crn, CRegister crm, int opcode_2) argument
2062 mcr(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2075 mcr2(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2) argument
2085 mrc(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2, Condition cond) argument
2098 mrc2(Coprocessor coproc, int opcode_1, Register rd, CRegister crn, CRegister crm, int opcode_2) argument
[all...]

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