| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| H A D | radeon_tex_copy.c | 54 gl_format dst_mesaformat; local
98 dst_mesaformat = timg->base.Base.TexFormat;
100 dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) {
103 if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
112 dst_mesaformat = MESA_FORMAT_RGB565;
116 dst_mesaformat = MESA_FORMAT_ARGB8888;
120 dst_mesaformat = MESA_FORMAT_A8;
130 timg->mt->bo, dst_offset, dst_mesaformat,
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| H A D | r200_blit.c | 453 * @param[in] dst_mesaformat destination image format
474 gl_format dst_mesaformat,
486 if (!r200_check_blit(dst_mesaformat, dst_pitch))
523 _mesa_get_format_name(dst_mesaformat), dst_bo);
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
540 emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
463 r200_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
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| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_tex_copy.c | 54 gl_format dst_mesaformat; local
98 dst_mesaformat = timg->base.Base.TexFormat;
100 dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) {
103 if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
112 dst_mesaformat = MESA_FORMAT_RGB565;
116 dst_mesaformat = MESA_FORMAT_ARGB8888;
120 dst_mesaformat = MESA_FORMAT_A8;
130 timg->mt->bo, dst_offset, dst_mesaformat,
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| H A D | radeon_blit.c | 331 * @param[in] dst_mesaformat destination image format
352 gl_format dst_mesaformat,
364 if (!r100_check_blit(dst_mesaformat, dst_pitch))
401 _mesa_get_format_name(dst_mesaformat), dst_bo);
418 emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
341 r100_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| H A D | radeon_tex_copy.c | 54 gl_format dst_mesaformat; local
98 dst_mesaformat = timg->base.Base.TexFormat;
100 dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) {
103 if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
112 dst_mesaformat = MESA_FORMAT_RGB565;
116 dst_mesaformat = MESA_FORMAT_ARGB8888;
120 dst_mesaformat = MESA_FORMAT_A8;
130 timg->mt->bo, dst_offset, dst_mesaformat,
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| H A D | r200_blit.c | 453 * @param[in] dst_mesaformat destination image format
474 gl_format dst_mesaformat,
486 if (!r200_check_blit(dst_mesaformat, dst_pitch))
523 _mesa_get_format_name(dst_mesaformat), dst_bo);
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
540 emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
463 r200_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_tex_copy.c | 54 gl_format dst_mesaformat; local
98 dst_mesaformat = timg->base.Base.TexFormat;
100 dst_bpp = _mesa_get_format_bytes(dst_mesaformat);
101 if (!radeon->vtbl.check_blit(dst_mesaformat, rrb->pitch / rrb->cpp)) {
103 if (_mesa_get_format_bits(dst_mesaformat, GL_DEPTH_BITS) > 0)
112 dst_mesaformat = MESA_FORMAT_RGB565;
116 dst_mesaformat = MESA_FORMAT_ARGB8888;
120 dst_mesaformat = MESA_FORMAT_A8;
130 timg->mt->bo, dst_offset, dst_mesaformat,
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| H A D | radeon_blit.c | 331 * @param[in] dst_mesaformat destination image format
352 gl_format dst_mesaformat,
364 if (!r100_check_blit(dst_mesaformat, dst_pitch))
401 _mesa_get_format_name(dst_mesaformat), dst_bo);
418 emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height);
341 r100_blit(struct gl_context *ctx, struct radeon_bo *src_bo, intptr_t src_offset, gl_format src_mesaformat, unsigned src_pitch, unsigned src_width, unsigned src_height, unsigned src_x_offset, unsigned src_y_offset, struct radeon_bo *dst_bo, intptr_t dst_offset, gl_format dst_mesaformat, unsigned dst_pitch, unsigned dst_width, unsigned dst_height, unsigned dst_x_offset, unsigned dst_y_offset, unsigned reg_width, unsigned reg_height, unsigned flip_y) argument
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