Searched defs:getSubReg (Results 1 - 4 of 4) sorted by relevance
/external/llvm/lib/MC/ |
H A D | MCRegisterInfo.cpp | 21 if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx)) 26 unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const { function in class:MCRegisterInfo
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/external/llvm/include/llvm/CodeGen/ |
H A D | MachineOperand.h | 269 unsigned getSubReg() const { function in class:llvm::MachineOperand 333 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
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/external/llvm/include/llvm/Target/ |
H A D | TargetRegisterInfo.h | 352 /// getSubReg(Reg, A) overlaps getSubReg(Reg, B) 859 unsigned getSubReg() const { return SubReg; } function 861 /// Returns the bit mask if register classes that getSubReg() projects into
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonHardwareLoops.cpp | 259 unsigned getSubReg() const { function in class:__anon26012::CountValue 761 SR = Start->getSubReg(); 764 SR = End->getSubReg(); 779 DistSR = End->getSubReg(); 789 SubIB.addReg(End->getReg(), 0, End->getSubReg()) 790 .addReg(Start->getReg(), 0, Start->getSubReg()); 793 .addReg(Start->getReg(), 0, Start->getSubReg()); 795 SubIB.addReg(End->getReg(), 0, End->getSubReg()) 1084 .addReg(TripCount->getReg(), 0, TripCount->getSubReg());
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