Searched defs:immr (Results 1 - 6 of 6) sorted by relevance

/external/chromium_org/v8/src/arm64/
H A Dassembler-arm64-inl.h1075 Instr Assembler::ImmR(unsigned immr, unsigned reg_size) { argument
1076 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(immr)) ||
1077 ((reg_size == kWRegSizeInBits) && is_uint5(immr)));
1079 DCHECK(is_uint6(immr));
1080 return immr << ImmR_offset;
1093 Instr Assembler::ImmRotate(unsigned immr, unsigned reg_size) { argument
1095 DCHECK(((reg_size == kXRegSizeInBits) && is_uint6(immr)) ||
1096 ((reg_size == kWRegSizeInBits) && is_uint5(immr)));
1098 return immr << ImmRotate_offset;
H A Dassembler-arm64.cc1279 unsigned immr,
1284 ImmR(immr, rd.SizeInBits()) |
1292 unsigned immr,
1297 ImmR(immr, rd.SizeInBits()) |
1305 unsigned immr,
1310 ImmR(immr, rd.SizeInBits()) |
2544 // N imms immr size S R
1277 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1290 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
1303 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
/external/llvm/lib/Target/AArch64/InstPrinter/
H A DAArch64InstPrinter.cpp116 int64_t immr = Op2.getImm(); local
118 if (Opcode == AArch64::UBFMWri && imms != 0x1F && ((imms + 1) == immr)) {
122 ((imms + 1 == immr))) {
127 shift = immr;
130 shift = immr;
133 shift = immr;
136 shift = immr;
/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AddressingModes.h212 /// the form N:immr:imms.
252 // Encode in immr the number of RORs it would take to get *from* this
255 unsigned immr = size - (i + 1); local
268 encoding = (N << 12) | (immr << 6) | (nimms & 0x3f);
294 /// "N:immr:imms" (where the immr and imms fields are each 6 bits) into the
297 // Extract the N, imms, and immr fields.
299 unsigned immr = (val >> 6) & 0x3f; local
306 unsigned R = immr & (size - 1);
322 /// in the form "N:immr
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/external/vixl/src/a64/
H A Dassembler-a64.cc739 unsigned immr,
744 ImmR(immr, rd.size()) | ImmS(imms, rn.size()) | Rn(rn) | Rd(rd));
750 unsigned immr,
755 ImmR(immr, rd.size()) | ImmS(imms, rn.size()) | Rn(rn) | Rd(rd));
761 unsigned immr,
766 ImmR(immr, rd.size()) | ImmS(imms, rn.size()) | Rn(rn) | Rd(rd));
1929 // N imms immr size S R
737 bfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
748 sbfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
759 ubfm(const Register& rd, const Register& rn, unsigned immr, unsigned imms) argument
/external/valgrind/main/VEX/priv/
H A Dguest_arm64_toIR.c1827 ULong immN, ULong imms, ULong immr, Bool immediate,
1832 vassert(immr < (1ULL << 6));
1852 ULong R = immr & levels;
1979 sf op 100100 N immr imms Rn Rd
2111 sf 10 100110 N immr imms nn dd
2112 UBFM Wd, Wn, #immr, #imms when sf=0, N=0, immr[5]=0, imms[5]=0
2113 UBFM Xd, Xn, #immr, #imms when sf=1, N=1
2115 sf 00 100110 N immr imms nn dd
2116 SBFM Wd, Wn, #immr, #imm
1826 dbm_DecodeBitMasks( ULong* wmask, ULong* tmask, ULong immN, ULong imms, ULong immr, Bool immediate, UInt M ) argument
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