Searched defs:irq (Results 1 - 25 of 57) sorted by relevance

123

/external/qemu/include/hw/
H A Dirq.h10 void qemu_set_irq(qemu_irq irq, int level);
12 static inline void qemu_irq_raise(qemu_irq irq) argument
14 qemu_set_irq(irq, 1);
17 static inline void qemu_irq_lower(qemu_irq irq) argument
19 qemu_set_irq(irq, 0);
22 static inline void qemu_irq_pulse(qemu_irq irq) argument
24 qemu_set_irq(irq, 1);
25 qemu_set_irq(irq, 0);
33 qemu_irq qemu_irq_invert(qemu_irq irq);
H A Dsysbus.h50 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq);
58 qemu_irq irq)
60 return sysbus_create_varargs(name, addr, irq, NULL);
56 sysbus_create_simple(const char *name, hwaddr addr, qemu_irq irq) argument
H A Dpcmcia.h9 qemu_irq irq; member in struct:__anon29880
/external/linux-tools-perf/perf-3.12.0/tools/perf/scripts/perl/
H A Dcheck-perf-trace.pl28 sub irq::softirq_entry subroutine
40 symbol_str("irq::softirq_entry", "vec", $vec));
/external/qemu/hw/arm/
H A Dpic.c25 static void arm_pic_cpu_handler(void *opaque, int irq, int level) argument
29 switch (irq) {
43 hw_error("arm_pic_cpu_handler: Bad interrput line %d\n", irq);
H A Darmv7m_nvic.c89 void armv7m_nvic_set_pending(void *opaque, int irq) argument
92 if (irq >= 16)
93 irq += 16;
94 gic_set_pending_private(&s->gic, 0, irq);
101 uint32_t irq; local
103 irq = gic_acknowledge_irq(&s->gic, 0);
104 if (irq == 1023)
106 if (irq >= 32)
107 irq -= 16;
108 return irq;
111 armv7m_nvic_complete_irq(void *opaque, int irq) argument
123 int irq; local
339 int irq; local
[all...]
/external/qemu/hw/mips/
H A Dmips_int.c23 static void cpu_mips_irq_request(void *opaque, int irq, int level) argument
27 if (irq < 0 || irq > 7)
31 env->CP0_Cause |= 1 << (irq + CP0Ca_IP);
33 env->CP0_Cause &= ~(1 << (irq + CP0Ca_IP));
45 env->irq[i] = qi[i];
H A Dmips_pic.c17 static void mips_cpu_irq_handler(void *opaque, int irq, int level) argument
22 if (irq < 0 || 7 < irq)
24 irq);
26 causebit = 0x00000100 << irq;
/external/qemu/hw/core/
H A Dirq.c25 #include "hw/irq.h"
33 void qemu_set_irq(qemu_irq irq, int level) argument
35 if (!irq)
38 irq->handler(irq->opaque, irq->n, level);
67 struct IRQState *irq = opaque; local
69 irq->handler(irq->opaque, irq
72 qemu_irq_invert(qemu_irq irq) argument
[all...]
H A Dsysbus.c26 void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq) argument
31 *dev->irqp[n] = irq;
135 qemu_irq irq; local
147 irq = va_arg(va, qemu_irq);
148 if (!irq) {
151 sysbus_connect_irq(s, n, irq);
/external/kernel-headers/original/uapi/linux/
H A Dbpqether.h38 int irq; /* unused */ member in struct:bpq_req
H A Dkernelcapi.h26 unsigned irq; member in struct:kcapi_carddef
H A Db1lli.h48 int irq; member in struct:avmb1_carddef
58 int irq; member in struct:avmb1_extcarddef
H A Dhdlcdrv.h17 int irq; member in struct:hdlcdrv_params
/external/oprofile/module/x86/
H A Dop_rtc.c30 static void do_rtc_interrupt(int irq, void * dev_id, struct pt_regs * regs) argument
/external/qemu/include/hw/android/goldfish/
H A Ddevice.h27 uint32_t irq; // filled in by goldfish_device_add if 0 member in struct:goldfish_device
32 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level);
40 void goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count);
41 int goldfish_device_bus_init(uint32_t base, uint32_t irq);
46 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq);
57 void events_dev_init(uint32_t base, qemu_irq irq);
/external/qemu/hw/android/goldfish/
H A Dinterrupt.c15 #include "hw/irq.h"
74 static void goldfish_int_set_irq(void *opaque, int irq, int level) argument
77 uint32_t mask = (1U << irq);
H A Ddevice.c55 void goldfish_device_set_irq(struct goldfish_device *dev, int irq, int level) argument
57 if(irq >= dev->irq_count)
58 cpu_abort (cpu_single_env, "goldfish_device_set_irq: Bad irq %d >= %d\n", irq, dev->irq_count);
60 qemu_set_irq(goldfish_pic[dev->irq + irq], level);
69 if(dev->irq == 0 && dev->irq_count > 0) {
70 dev->irq = goldfish_free_irq;
86 //printf("goldfish_add_device: %s, base %x %x, irq %d %d\n",
87 // dev->name, dev->base, dev->size, dev->irq, de
215 goldfish_device_init(qemu_irq *pic, uint32_t base, uint32_t size, uint32_t irq, uint32_t irq_count) argument
222 goldfish_device_bus_init(uint32_t base, uint32_t irq) argument
[all...]
H A Dtty.c209 int goldfish_tty_add(CharDriverState *cs, int id, uint32_t base, int irq) argument
220 s->dev.irq = irq;
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
H A Dradeon_screen.h64 unsigned int irq; /* IRQ number (0 means none) */ member in struct:radeon_screen
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/
H A Dradeon_screen.h64 unsigned int irq; /* IRQ number (0 means none) */ member in struct:radeon_screen
/external/kernel-headers/original/uapi/asm-mips/asm/
H A Dkvm.h132 __u32 irq; member in struct:kvm_mips_interrupt
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dradeon_screen.h64 unsigned int irq; /* IRQ number (0 means none) */ member in struct:radeon_screen
/external/mesa3d/src/mesa/drivers/dri/radeon/
H A Dradeon_screen.h64 unsigned int irq; /* IRQ number (0 means none) */ member in struct:radeon_screen
/external/qemu/hw/timer/
H A Di8254.c50 /* irq handling */
53 qemu_irq irq; member in struct:PITChannelState
285 /* XXX: update irq timer ? */
372 qemu_set_irq(s->irq, irq_level);
488 PITState *pit_init(int base, qemu_irq irq) argument
496 s->irq = irq;

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