/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXFrameLowering.h | 22 bool is64bit; member in class:llvm::NVPTXFrameLowering
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H A D | NVPTXTargetMachine.cpp | 73 CodeGenOpt::Level OL, bool is64bit) 75 Subtarget(TT, CPU, FS, *this, is64bit) { 69 NVPTXTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDILDeviceInfo.cpp | 21 bool is64bit, bool is64on32bit) 34 assert(!is64bit && "This device does not support 64bit pointers!"); 41 assert(!is64bit && "This device does not support 64bit pointers!"); 48 assert(!is64bit && "This device does not support 64bit pointers!"); 55 assert(!is64bit && "This device does not support 64bit pointers!"); 63 assert(!is64bit && "This device does not support 64bit pointers!"); 70 assert(!is64bit && "This device does not support 64bit pointers!"); 77 assert(!is64bit && "This device does not support 64bit pointers!"); 86 assert(!is64bit && "This device does not support 64bit pointers!"); 20 getDeviceFromName(const std::string &deviceName, AMDGPUSubtarget *ptr, bool is64bit, bool is64on32bit) argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDILDeviceInfo.cpp | 21 bool is64bit, bool is64on32bit) 34 assert(!is64bit && "This device does not support 64bit pointers!"); 41 assert(!is64bit && "This device does not support 64bit pointers!"); 48 assert(!is64bit && "This device does not support 64bit pointers!"); 55 assert(!is64bit && "This device does not support 64bit pointers!"); 63 assert(!is64bit && "This device does not support 64bit pointers!"); 70 assert(!is64bit && "This device does not support 64bit pointers!"); 77 assert(!is64bit && "This device does not support 64bit pointers!"); 86 assert(!is64bit && "This device does not support 64bit pointers!"); 20 getDeviceFromName(const std::string &deviceName, AMDGPUSubtarget *ptr, bool is64bit, bool is64on32bit) argument
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcTargetMachine.cpp | 33 bool is64bit) 35 Subtarget(TT, CPU, FS, *this, is64bit) { 28 SparcTargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL, bool is64bit) argument
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/external/llvm/include/llvm/Support/ |
H A D | OutputBuffer.h | 32 bool is64bit, bool le) 33 : Output(Out), is64Bit(is64bit), isLittleEndian(le) {} 31 OutputBuffer(std::vector<unsigned char> &Out, bool is64bit, bool le) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/ |
H A D | nv50_query.c | 47 boolean is64bit; member in struct:nv50_query 113 q->is64bit = (type == PIPE_QUERY_PRIMITIVES_GENERATED || 163 if (!q->is64bit) 242 return q->ready || (!q->is64bit && (q->data[0] == q->sequence));
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nvc0/ |
H A D | nvc0_query.c | 44 boolean is64bit; member in struct:nvc0_query 115 q->is64bit = TRUE; 120 q->is64bit = TRUE; 150 if (!q->is64bit) 325 if (q->is64bit) {
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/external/kernel-headers/original/uapi/linux/ |
H A D | dlm_device.h | 64 __u8 is64bit; member in struct:dlm_write_request
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/external/libcxxabi/src/Unwind/ |
H A D | libunwind.cpp | 105 static bool is64bit(task_t task) { function 112 if (is64bit(task)) {
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPUSubtarget.h | 75 bool is64bit() const { function in class:llvm::AMDGPUSubtarget
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/external/mesa3d/src/gallium/drivers/nv50/ |
H A D | nv50_query.c | 47 boolean is64bit; member in struct:nv50_query 113 q->is64bit = (type == PIPE_QUERY_PRIMITIVES_GENERATED || 163 if (!q->is64bit) 242 return q->ready || (!q->is64bit && (q->data[0] == q->sequence));
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/external/mesa3d/src/gallium/drivers/nvc0/ |
H A D | nvc0_query.c | 44 boolean is64bit; member in struct:nvc0_query 115 q->is64bit = TRUE; 120 q->is64bit = TRUE; 150 if (!q->is64bit) 325 if (q->is64bit) {
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/external/clang/lib/Frontend/ |
H A D | InitHeaderSearch.cpp | 190 bool is64bit = arch == llvm::Triple::ppc64 || arch == llvm::Triple::x86_64; local 191 if (is64bit)
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FastISel.cpp | 203 bool is64bit = (VT == MVT::f64); local 210 if (is64bit) { 234 unsigned Opc = is64bit ? AArch64::LDRDui : AArch64::LDRSui; 1854 bool is64bit = (DestVT == MVT::i64); local 1859 DivOpc = is64bit ? AArch64::SDIVXr : AArch64::SDIVWr; 1862 DivOpc = is64bit ? AArch64::UDIVXr : AArch64::UDIVWr; 1865 unsigned MSubOpc = is64bit ? AArch64::MSUBXrrr : AArch64::MSUBWrrr;
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 470 bool is64bit = VT == MVT::f64; local 477 if (is64bit) { 501 unsigned Opc = is64bit ? ARM::VLDRD : ARM::VLDRS; 1805 bool is64bit = VT == MVT::f64 || VT == MVT::i64; local 1809 Opc = is64bit ? ARM::VADDD : ARM::VADDS; 1812 Opc = is64bit ? ARM::VSUBD : ARM::VSUBS; 1815 Opc = is64bit ? ARM::VMULD : ARM::VMULS;
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 1603 bool is64bit = Subtarget.isPPC64(); local 1612 SDValue TLSReg = DAG.getRegister(is64bit ? PPC::X13 : PPC::R2, 1613 is64bit ? MVT::i64 : MVT::i32); 1623 if (is64bit) { 6257 bool is64bit, unsigned BinOpcode) const { 6283 is64bit ? (const TargetRegisterClass *) &PPC::G8RCRegClass : 6298 BuildMI(BB, dl, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest) 6302 BuildMI(BB, dl, TII->get(is64bit ? PPC::STDCX : PPC::STWCX)) 6326 bool is64bit = Subtarget.isPPC64(); local 6327 unsigned ZeroReg = is64bit 6256 EmitAtomicBinary(MachineInstr *MI, MachineBasicBlock *BB, bool is64bit, unsigned BinOpcode) const argument 6864 bool is64bit = MI->getOpcode() == PPC::ATOMIC_CMP_SWAP_I64; local 6933 bool is64bit = Subtarget.isPPC64(); local [all...] |