Searched defs:mir (Results 26 - 28 of 28) sorted by relevance

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/art/compiler/dex/quick/x86/
H A Dint_x86.cc270 void X86Mir2Lir::GenSelect(BasicBlock* bb, MIR* mir) { argument
272 RegLocation rl_src = mir_graph_->GetSrc(mir, 0);
273 RegLocation rl_dest = mir_graph_->GetDest(mir);
277 ConditionCode ccode = mir->meta.ccode;
280 const bool is_constant_case = (mir->ssa_rep->num_uses == 1);
283 int true_val = mir->dalvikInsn.vB;
284 int false_val = mir->dalvikInsn.vC;
347 RegLocation rl_true = mir_graph_->GetSrc(mir, 1);
348 RegLocation rl_false = mir_graph_->GetSrc(mir, 2);
384 void X86Mir2Lir::GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) { argument
[all...]
H A Dtarget_x86.cc1685 void X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { argument
1686 switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
1688 ReserveVectorRegisters(mir);
1694 GenConst128(bb, mir);
1697 GenMoveVector(bb, mir);
1700 GenMultiplyVector(bb, mir);
1703 GenAddVector(bb, mir);
1706 GenSubtractVector(bb, mir);
1709 GenShiftLeftVector(bb, mir);
1712 GenSignedShiftRightVector(bb, mir);
1740 ReserveVectorRegisters(MIR* mir) argument
1785 GenConst128(BasicBlock* bb, MIR* mir) argument
1803 AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) argument
1828 GenMoveVector(BasicBlock *bb, MIR *mir) argument
1836 GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir) argument
1878 GenMultiplyVector(BasicBlock *bb, MIR *mir) argument
1908 GenAddVector(BasicBlock *bb, MIR *mir) argument
1939 GenSubtractVector(BasicBlock *bb, MIR *mir) argument
1970 GenShiftByteVector(BasicBlock *bb, MIR *mir) argument
2019 GenShiftLeftVector(BasicBlock *bb, MIR *mir) argument
2047 GenSignedShiftRightVector(BasicBlock *bb, MIR *mir) argument
2072 GenUnsignedShiftRightVector(BasicBlock *bb, MIR *mir) argument
2100 GenAndVector(BasicBlock *bb, MIR *mir) argument
2108 GenOrVector(BasicBlock *bb, MIR *mir) argument
2116 GenXorVector(BasicBlock *bb, MIR *mir) argument
2142 GenAddReduceVector(BasicBlock *bb, MIR *mir) argument
2235 GenReduceVector(BasicBlock *bb, MIR *mir) argument
2275 GenSetVector(BasicBlock *bb, MIR *mir) argument
2348 ScanVectorLiteral(MIR *mir) argument
2359 AddVectorLiteral(MIR *mir) argument
[all...]
/art/compiler/dex/
H A Dmir_graph.h418 void AppendMIR(MIR* mir);
421 void PrependMIR(MIR* mir);
426 MIR* FindPreviousMIR(MIR* mir);
429 bool RemoveMIR(MIR* mir);
532 MIR* mir; member in struct:art::CallInfo
662 const MirIFieldLoweringInfo& GetIFieldLoweringInfo(MIR* mir) const {
663 DCHECK_LT(mir->meta.ifield_lowering_info, ifield_lowering_infos_.Size());
664 return ifield_lowering_infos_.GetRawStorage()[mir->meta.ifield_lowering_info];
667 const MirSFieldLoweringInfo& GetSFieldLoweringInfo(MIR* mir) const {
668 DCHECK_LT(mir
674 GetMethodLoweringInfo(MIR* mir) argument
769 GetRawSrc(MIR* mir, int num) argument
775 GetRawDest(MIR* mir) argument
781 GetDest(MIR* mir) argument
787 GetSrc(MIR* mir, int num) argument
793 GetDestWide(MIR* mir) argument
799 GetSrcWide(MIR* mir, int low) argument
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