Searched defs:num_regs (Results 1 - 25 of 27) sorted by relevance

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/external/valgrind/main/coregrind/m_gdbserver/
H A Dvalgrind_low.h38 int num_regs; member in struct:valgrind_target_ops
H A Dvalgrind-low-arm.c102 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
184 int set = abs_regno / num_regs;
185 int regno = abs_regno % num_regs;
291 num_regs,
304 set_register_cache (regs, num_regs);
H A Dvalgrind-low-arm64.c113 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
144 int set = abs_regno / num_regs;
145 int regno = abs_regno % num_regs;
241 num_regs,
254 set_register_cache (regs, num_regs);
H A Dvalgrind-low-ppc32.c152 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
183 int set = abs_regno / num_regs;
184 int regno = abs_regno % num_regs;
336 num_regs,
349 set_register_cache (regs, num_regs);
H A Dvalgrind-low-ppc64.c149 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
180 int set = abs_regno / num_regs;
181 int regno = abs_regno % num_regs;
333 num_regs,
346 set_register_cache (regs, num_regs);
H A Dvalgrind-low-s390x.c94 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
125 int set = abs_regno / num_regs;
126 int regno = abs_regno % num_regs;
201 num_regs,
214 set_register_cache (regs, num_regs);
H A Dvalgrind-low-x86.c92 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
123 int set = abs_regno / num_regs;
124 int regno = abs_regno % num_regs;
261 num_regs,
274 set_register_cache (regs, num_regs);
H A Dvalgrind-low-mips32.c116 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
256 int set = abs_regno / num_regs;
257 int regno = abs_regno % num_regs;
358 num_regs,
371 set_register_cache (regs, num_regs);
H A Dvalgrind-low-mips64.c117 #define num_regs (sizeof (regs) / sizeof (regs[0])) macro
257 int set = abs_regno / num_regs;
258 int regno = abs_regno % num_regs;
359 num_regs,
372 set_register_cache (regs, num_regs);
/external/libunwind/include/tdep-ia64/
H A Drse.h58 rse_skip_regs (uint64_t addr, long num_regs) argument
60 long delta = rse_slot_num(addr) + num_regs;
62 if (num_regs < 0)
64 return addr + ((num_regs + delta/0x3f) << 3);
/external/lldb/source/Plugins/Process/Utility/
H A DDynamicRegisterInfo.cpp81 const uint32_t num_regs = regs.GetSize(); local
92 for (uint32_t i=0; i<num_regs; ++i)
H A DRegisterContextMemory.cpp45 const size_t num_regs = reg_infos.GetNumRegisters(); local
46 assert (num_regs > 0);
47 m_reg_valid.resize (num_regs);
/external/libunwind/src/ia64/
H A DGstep.c70 unw_word_t sc_addr, num_regs;
76 num_regs = c->cfm & 0x7f;
78 num_regs = 0;
87 *num_regsp = num_regs; /* size of frame */
224 unw_word_t prev_ip, prev_sp, prev_bsp, ip, num_regs; local
265 num_regs = 0;
274 if ((ret = linux_sigtramp (c, prev_cfm_loc, &num_regs)) < 0)
281 if ((ret = linux_interrupt (c, prev_cfm_loc, &num_regs,
288 if ((ret = hpux_sigtramp (c, prev_cfm_loc, &num_regs)) < 0)
311 num_regs
[all...]
H A DGscript.c396 int r, i, j, max, max_reg, max_when, num_regs = 0; local
406 regorder[num_regs++] = r;
413 for (i = max = 0; i < num_regs - 1; ++i)
418 for (j = i + 1; j < num_regs; ++j)
431 return num_regs;
440 int num_regs, i, ret, regorder[IA64_NUM_PREGS - 3]; local
491 num_regs = sort_regs (&sr, regorder);
492 for (i = 0; i < num_regs; ++i)
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/
H A Dnvfx_fragprog.c29 int num_regs; member in struct:nvfx_fpc
175 if (fpc->num_regs < (dst.index + 1))
176 fpc->num_regs = dst.index + 1;
1132 fpc->num_regs = 2;
1188 fp->fp_control |= (fpc->num_regs-1)/2;
1190 fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT;
/external/lldb/source/API/
H A DSBFrame.cpp891 const uint32_t num_regs = reg_ctx->GetRegisterCount(); local
892 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
1241 const uint32_t num_regs = reg_ctx->GetRegisterCount(); local
1242 for (uint32_t reg_idx = 0; reg_idx < num_regs; ++reg_idx)
/external/ltrace/sysdeps/linux-gnu/x86/
H A Dfetch.c301 size_t num_regs = 0; local
304 num_regs = 8;
308 num_regs = 2;
311 if (context->freg >= num_regs) {
/external/mesa3d/src/gallium/drivers/nv30/
H A Dnvfx_fragprog.c29 int num_regs; member in struct:nvfx_fpc
175 if (fpc->num_regs < (dst.index + 1))
176 fpc->num_regs = dst.index + 1;
1132 fpc->num_regs = 2;
1188 fp->fp_control |= (fpc->num_regs-1)/2;
1190 fp->fp_control |= fpc->num_regs << NV40_3D_FP_CONTROL_TEMP_COUNT__SHIFT;
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/
H A Dtgsi_ppc.c101 uint num_regs; member in struct:gen_context
423 for (i = 0; i < gen->num_regs; i++) {
433 gen->regs[gen->num_regs].src = *src;
434 gen->regs[gen->num_regs].chan = chan;
435 gen->regs[gen->num_regs].vec = vec;
436 gen->num_regs++;
438 assert(gen->num_regs <= Elements(gen->regs));
453 for (i = 0; i < gen->num_regs; i++) {
459 gen->num_regs = 0;
/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_eu_emit.c1851 int num_regs,
1863 if (num_regs == 1) {
1963 int num_regs,
1976 if (num_regs == 1) {
1849 brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, GLuint offset) argument
1960 brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, GLuint offset) argument
/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_ppc.c101 uint num_regs; member in struct:gen_context
423 for (i = 0; i < gen->num_regs; i++) {
433 gen->regs[gen->num_regs].src = *src;
434 gen->regs[gen->num_regs].chan = chan;
435 gen->regs[gen->num_regs].vec = vec;
436 gen->num_regs++;
438 assert(gen->num_regs <= Elements(gen->regs));
453 for (i = 0; i < gen->num_regs; i++) {
459 gen->num_regs = 0;
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_eu_emit.c1851 int num_regs,
1863 if (num_regs == 1) {
1963 int num_regs,
1976 if (num_regs == 1) {
1849 brw_oword_block_write_scratch(struct brw_compile *p, struct brw_reg mrf, int num_regs, GLuint offset) argument
1960 brw_oword_block_read_scratch(struct brw_compile *p, struct brw_reg dest, struct brw_reg mrf, int num_regs, GLuint offset) argument
/external/qemu/
H A Dgdbstub.c261 int num_regs; member in struct:GDBRegisterState
1393 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1409 if (r->base_reg <= reg && reg < r->base_reg + r->num_regs) {
1424 int num_regs, const char *xml, int g_pos)
1432 s->num_regs = num_regs;
1444 last_reg += num_regs;
1422 gdb_register_coprocessor(CPUState *cpu, gdb_reg_cb get_reg, gdb_reg_cb set_reg, int num_regs, const char *xml, int g_pos) argument
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r600/
H A Devergreen_state.c1641 uint32_t max_dist, num_regs, *sample_locs; local
1646 num_regs = Elements(sample_locs_2x);
1651 num_regs = Elements(sample_locs_4x);
1656 num_regs = Elements(sample_locs_8x);
1661 num_regs = Elements(sample_locs_16x);
1673 if (num_regs <= 8) {
1679 if (num_regs <= 16) {
/external/mesa3d/src/gallium/drivers/r600/
H A Devergreen_state.c1641 uint32_t max_dist, num_regs, *sample_locs; local
1646 num_regs = Elements(sample_locs_2x);
1651 num_regs = Elements(sample_locs_4x);
1656 num_regs = Elements(sample_locs_8x);
1661 num_regs = Elements(sample_locs_16x);
1673 if (num_regs <= 8) {
1679 if (num_regs <= 16) {

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