Searched defs:ori (Results 1 - 5 of 5) sorted by relevance

/external/chromium_org/third_party/skia/src/views/
H A DSkStackViewLayout.cpp20 void SkStackViewLayout::setOrient(Orient ori) argument
22 SkASSERT((unsigned)ori < kOrientCount);
23 fOrient = SkToU8(ori);
/external/skia/src/views/
H A DSkStackViewLayout.cpp20 void SkStackViewLayout::setOrient(Orient ori) argument
22 SkASSERT((unsigned)ori < kOrientCount);
23 fOrient = SkToU8(ori);
/external/openssl/crypto/cms/
H A Dcms_lcl.h190 CMS_OtherRecipientInfo *ori; member in union:CMS_RecipientInfo_st::__anon28190
/external/chromium_org/v8/src/mips/
H A Dassembler-mips.cc205 // specially coded on MIPS means that it is a lui/ori instruction, and that is
1574 void Assembler::ori(Register rt, Register rs, int32_t j) { function in class:v8::Assembler
1661 ori(at, at, src.offset_ & kImm16Mask); // Load 32-bit offset.
2533 ori(at, at, (imm32 & kImm16Mask));
2559 // Interpret 2 instructions generated by li: lui/ori
2581 // On Mips, a target address is stored in a lui/ori instruction pair, each
2602 // Must use 2 instructions to insure patchable code => just use lui and ori.
2604 // ori rt rt, lower-16.
2695 // Address pc points to lui/ori instructions.
/external/chromium_org/v8/src/mips64/
H A Dassembler-mips64.cc183 // specially coded on MIPS means that it is a lui/ori instruction, and that is
1638 void Assembler::ori(Register rt, Register rs, int32_t j) { function in class:v8::Assembler
1788 ori(at, at, src.offset_ & kImm16Mask); // Load 32-bit offset.
2774 ori(at, at, (imm64 >> 16) & kImm16Mask);
2776 ori(at, at, imm64 & kImm16Mask);
2835 // 1: ori(rd, rd, (j.imm64_ >> 16) & kImm16Mask);
2837 // 3: ori(rd, rd, j.imm32_ & kImm16Mask);
2839 // Patching the address must replace all the lui & ori instructions,
2868 // ori rt, rt, lower-16.
2870 // ori r
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