| /external/llvm/test/MC/ARM/ |
| H A D | arm-arithmetic-aliases.s | 36 orr r2, r2, #6 label
37 orr r2, #6 label
38 orr r2, r2, r3 label
39 orr r2, r3 label
41 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
42 @ CHECK: orr r2, r2, #6 @ encoding: [0x06,0x20,0x82,0xe3]
43 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
44 @ CHECK: orr r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe1]
|
| /external/llvm/test/MC/AArch64/ |
| H A D | arm64-diags.s | 222 orr w0, w0, w0, lsl #32 label
224 ; CHECK-ERRORS: orr w0, w0, w0, lsl #32
|
| /external/vixl/src/a64/ |
| H A D | assembler-a64.cc | 672 void Assembler::orr(const Register& rd, function in class:vixl::Assembler
1170 // second operand of zero. Otherwise, orr with first operand zr is
1175 orr(rd, AppropriateZeroRegFor(rd), rm);
|
| /external/chromium_org/v8/src/arm/ |
| H A D | assembler-arm.cc | 816 // orr dst, dst, #target8_1 << 8
817 // orr dst, dst, #target8_2 << 16
850 // Patch with a sequence of mov/orr/orr instructions.
859 patcher.masm()->orr(dst, dst, Operand(target8_1 << 8));
865 patcher.masm()->orr(dst, dst, Operand(target8_1 << 8));
866 patcher.masm()->orr(dst, dst, Operand(target8_2 << 16));
1086 // A movw / movt or mov / orr immediate load.
1132 orr(target, target, Operand(imm32 & (kImm8Mask << 8)), LeaveCC, cond);
1133 orr(targe
1458 void Assembler::orr(Register dst, Register src1, const Operand& src2, function in class:v8::internal::Assembler
[all...] |
| H A D | assembler-arm.h | 900 void orr(Register dst, Register src1, const Operand& src2,
902 void orr(Register dst, Register src1, Register src2, function in class:v8::internal::Assembler
904 orr(dst, src1, Operand(src2), s, cond);
|
| /external/chromium_org/v8/src/arm64/ |
| H A D | assembler-arm64.cc | 1212 void Assembler::orr(const Register& rd, function in class:v8::internal::Assembler
1728 // second operand of zero. Otherwise, orr with first operand zr is
1733 orr(rd, AppropriateZeroRegFor(rd), rm);
|