Searched defs:output (Results 1 - 7 of 7) sorted by relevance

/art/runtime/
H A Dindenter_test.cc21 std::ostringstream output; local
22 Indenter indent_filter(output.rdbuf(), '\t', 2);
25 EXPECT_EQ(output.str(), "");
28 EXPECT_EQ(output.str(), "\t\thello");
31 EXPECT_EQ(output.str(), "\t\thello\n\t\thello again");
34 EXPECT_EQ(output.str(), "\t\thello\n\t\thello again\n");
/art/compiler/
H A Doutput_stream_test.cc92 std::vector<uint8_t> output; local
93 VectorOutputStream output_stream("test vector output", output);
96 CheckTestOutput(output);
/art/test/050-sync-test/src/
H A DMain.java109 output(mNumber);
117 void output(int num) { method in class:CpuThread
/art/compiler/optimizing/
H A Dgraph_visualizer.cc32 std::ostream& output,
36 output_(output),
242 HGraphVisualizer::HGraphVisualizer(std::ostream* output, argument
247 : output_(output), graph_(graph), codegen_(codegen), is_enabled_(false) {
248 if (output == nullptr) {
265 HGraphVisualizer::HGraphVisualizer(std::ostream* output, argument
269 : output_(output), graph_(graph), codegen_(codegen), is_enabled_(false) {
270 if (output == nullptr) {
31 HGraphVisualizerPrinter(HGraph* graph, std::ostream& output, const char* pass_name, const CodeGenerator& codegen) argument
H A Dregister_allocator.cc128 // Some instructions define their output in fixed register/stack slot. We need
135 Location output = locations->Out(); local
137 if (output.IsRegister()) {
140 current->SetRegister(output.reg().RegId());
141 BlockRegister(output, position, position + 1, instruction->GetType());
142 } else if (output.IsStackSlot() || output.IsDoubleStackSlot()) {
143 current->SetSpillSlot(output.GetStackIndex());
750 // it with moves for connecting siblings in a same block, and output moves.
791 // This is a parallel move for moving the output o
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H A Dcode_generator_arm.cc563 // Condition has been materialized, compare the output to 0
1052 Register output = locations->Out().AsArm().AsCoreRegister(); local
1062 __ LoadImmediate(output, 0);
1069 __ LoadImmediate(output, 1);
1073 __ LoadImmediate(output, -1);
H A Dcode_generator_x86.cc1017 Register output = locations->Out().AsX86().AsCpuRegister(); local
1034 __ movl(output, Immediate(0));
1039 __ movl(output, Immediate(1));
1043 __ movl(output, Immediate(-1));

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