Searched defs:va_offset (Results 1 - 4 of 4) sorted by relevance
| /external/chromium_org/third_party/mesa/src/src/gallium/winsys/radeon/drm/ |
| H A D | radeon_drm_bo.c | 123 uint64_t va_offset; member in struct:radeon_bomgr
243 offset = mgr->va_offset;
256 mgr->va_offset += size + waste;
264 if (va >= mgr->va_offset) {
265 if (va > mgr->va_offset) {
269 hole->size = va - mgr->va_offset;
270 hole->offset = mgr->va_offset;
274 mgr->va_offset = va + size;
306 if ((va + size) == mgr->va_offset) {
307 mgr->va_offset
[all...] |
| /external/mesa3d/src/gallium/winsys/radeon/drm/ |
| H A D | radeon_drm_bo.c | 123 uint64_t va_offset; member in struct:radeon_bomgr
243 offset = mgr->va_offset;
256 mgr->va_offset += size + waste;
264 if (va >= mgr->va_offset) {
265 if (va > mgr->va_offset) {
269 hole->size = va - mgr->va_offset;
270 hole->offset = mgr->va_offset;
274 mgr->va_offset = va + size;
306 if ((va + size) == mgr->va_offset) {
307 mgr->va_offset
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
| H A D | si_state.c | 2285 uint64_t va_offset; local
2301 va_offset = r600_resource_va(ctx->screen, (void*)rbuffer);
2302 va_offset += offset;
2308 si_pm4_set_reg(pm4, R_00B130_SPI_SHADER_USER_DATA_VS_0, va_offset);
2309 si_pm4_set_reg(pm4, R_00B134_SPI_SHADER_USER_DATA_VS_1, va_offset >> 32);
2314 si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0, va_offset);
2315 si_pm4_set_reg(pm4, R_00B034_SPI_SHADER_USER_DATA_PS_1, va_offset >> 32);
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| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| H A D | si_state.c | 2285 uint64_t va_offset; local
2301 va_offset = r600_resource_va(ctx->screen, (void*)rbuffer);
2302 va_offset += offset;
2308 si_pm4_set_reg(pm4, R_00B130_SPI_SHADER_USER_DATA_VS_0, va_offset);
2309 si_pm4_set_reg(pm4, R_00B134_SPI_SHADER_USER_DATA_VS_1, va_offset >> 32);
2314 si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0, va_offset);
2315 si_pm4_set_reg(pm4, R_00B034_SPI_SHADER_USER_DATA_PS_1, va_offset >> 32);
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