Searched defs:zero_reg (Results 1 - 11 of 11) sorted by relevance

/external/chromium_org/third_party/libvpx/source/libvpx/vp9/encoder/x86/
H A Dvp9_error_intrin_avx2.c25 const __m256i zero_reg = _mm256_set1_epi16(0); local
42 exp_dqcoeff_lo = _mm256_unpacklo_epi32(dqcoeff_reg, zero_reg);
43 exp_dqcoeff_hi = _mm256_unpackhi_epi32(dqcoeff_reg, zero_reg);
45 exp_coeff_lo = _mm256_unpacklo_epi32(coeff_reg, zero_reg);
46 exp_coeff_hi = _mm256_unpackhi_epi32(coeff_reg, zero_reg);
H A Dvp9_variance_impl_intrin_avx2.c22 __m256i zero_reg = _mm256_set1_epi16(0); local
42 src_expand_low = _mm256_unpacklo_epi8(src, zero_reg);
43 src_expand_high = _mm256_unpackhi_epi8(src, zero_reg);
45 ref_expand_low = _mm256_unpacklo_epi8(ref, zero_reg);
46 ref_expand_high = _mm256_unpackhi_epi8(ref, zero_reg);
85 expand_sum_low = _mm_unpacklo_epi16(_mm256_castsi256_si128(zero_reg),
87 expand_sum_high = _mm_unpackhi_epi16(_mm256_castsi256_si128(zero_reg),
98 _mm256_castsi256_si128(zero_reg));
100 _mm256_castsi256_si128(zero_reg));
105 _mm256_castsi256_si128(zero_reg));
133 __m256i zero_reg = _mm256_set1_epi16(0); local
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H A Dvp9_subpel_variance_impl_intrin_avx2.c85 exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
86 exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
101 res_cmp = _mm256_cmpgt_epi16(zero_reg, sum_reg); \
131 __m256i zero_reg; local
135 zero_reg = _mm256_set1_epi16(0);
143 MERGE_WITH_SRC(src_reg, zero_reg)
155 MERGE_WITH_SRC(src_reg, zero_reg)
185 MERGE_WITH_SRC(src_reg, zero_reg)
205 MERGE_WITH_SRC(src_avg, zero_reg)
269 MERGE_WITH_SRC(src_pack, zero_reg)
325 __m256i zero_reg; local
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/external/libvpx/libvpx/vp9/encoder/x86/
H A Dvp9_variance_impl_intrin_avx2.c22 __m256i zero_reg = _mm256_set1_epi16(0); local
42 src_expand_low = _mm256_unpacklo_epi8(src, zero_reg);
43 src_expand_high = _mm256_unpackhi_epi8(src, zero_reg);
45 ref_expand_low = _mm256_unpacklo_epi8(ref, zero_reg);
46 ref_expand_high = _mm256_unpackhi_epi8(ref, zero_reg);
85 expand_sum_low = _mm_unpacklo_epi16(_mm256_castsi256_si128(zero_reg),
87 expand_sum_high = _mm_unpackhi_epi16(_mm256_castsi256_si128(zero_reg),
98 _mm256_castsi256_si128(zero_reg));
100 _mm256_castsi256_si128(zero_reg));
105 _mm256_castsi256_si128(zero_reg));
133 __m256i zero_reg = _mm256_set1_epi16(0); local
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H A Dvp9_subpel_variance_impl_intrin_avx2.c85 exp_dst_lo = _mm256_unpacklo_epi8(dst_reg, zero_reg); \
86 exp_dst_hi = _mm256_unpackhi_epi8(dst_reg, zero_reg); \
101 res_cmp = _mm256_cmpgt_epi16(zero_reg, sum_reg); \
131 __m256i zero_reg; local
135 zero_reg = _mm256_set1_epi16(0);
143 MERGE_WITH_SRC(src_reg, zero_reg)
155 MERGE_WITH_SRC(src_reg, zero_reg)
185 MERGE_WITH_SRC(src_reg, zero_reg)
205 MERGE_WITH_SRC(src_avg, zero_reg)
269 MERGE_WITH_SRC(src_pack, zero_reg)
325 __m256i zero_reg; local
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/external/chromium_org/v8/src/mips/
H A Dsimulator-mips.h119 zero_reg = 0, enumerator in enum:v8::internal::Simulator::Register
H A Dmacro-assembler-mips.h168 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
169 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
189 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
455 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
470 // Return <n> if we have a sll zero_reg, zero_reg, n
473 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
474 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
188 Ret(BranchDelaySlot bd, Condition cond = al, Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) argument
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H A Dcode-stubs-mips.cc160 __ ctc1(zero_reg, FCSR);
178 __ Branch(&error, ne, scratch, Operand(zero_reg));
202 __ Movz(result_reg, zero_reg, scratch);
203 __ Branch(&done, eq, scratch, Operand(zero_reg));
212 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg));
213 __ mov(result_reg, zero_reg);
230 __ mov(input_high, zero_reg);
249 __ Branch(&pos_shift, ge, scratch, Operand(zero_reg));
252 __ Subu(scratch, zero_reg, scratch);
265 __ Subu(result_reg, zero_reg, input_hig
328 __ mov(scratch(), zero_reg); local
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/external/chromium_org/v8/src/mips64/
H A Dsimulator-mips64.h148 zero_reg = 0, enumerator in enum:v8::internal::Simulator::Register
H A Dmacro-assembler-mips64.h189 #define COND_ARGS Condition cond = al, Register rs = zero_reg, \
190 const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT
210 Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) {
476 // i.e. check if it is a sll zero_reg, zero_reg, <type> (referenced as
491 // Return <n> if we have a sll zero_reg, zero_reg, n
494 rt == static_cast<uint32_t>(ToNumber(zero_reg)) &&
495 rs == static_cast<uint32_t>(ToNumber(zero_reg)));
209 Ret(BranchDelaySlot bd, Condition cond = al, Register rs = zero_reg, const Operand& rt = Operand(zero_reg)) argument
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H A Dcode-stubs-mips64.cc158 __ ctc1(zero_reg, FCSR);
176 __ Branch(&error, ne, scratch, Operand(zero_reg));
198 __ Movz(result_reg, zero_reg, scratch);
199 __ Branch(&done, eq, scratch, Operand(zero_reg));
208 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg));
209 __ mov(result_reg, zero_reg);
226 __ mov(input_high, zero_reg);
245 __ Branch(&pos_shift, ge, scratch, Operand(zero_reg));
248 __ Subu(scratch, zero_reg, scratch);
261 __ Subu(result_reg, zero_reg, input_hig
324 __ mov(scratch(), zero_reg); local
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