Searched refs:EBP (Results 26 - 48 of 48) sorted by relevance

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/external/llvm/lib/Target/X86/Disassembler/
H A DX86DisassemblerDecoder.h140 ENTRY(EBP) \
158 ENTRY(EBP) \
/external/libunwind/src/x86/
H A DGos-freebsd.c128 c->dwarf.loc[EBP] = DWARF_LOC (uc_addr + FREEBSD_UC_MCONTEXT_EBP_OFF, 0);
H A DGos-linux.c128 c->dwarf.loc[EBP] = DWARF_LOC (sc_addr + LINUX_SC_EBP_OFF, 0);
/external/valgrind/main/VEX/auxprogs/
H A Dgenoffsets.c92 GENOFFSET(X86,x86,EBP);
/external/valgrind/main/coregrind/m_sigframe/
H A Dsigframe-x86-linux.c376 SC2(ebp,EBP);
/external/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp456 // Encode that we are using EBP/RBP as the frame pointer.
483 (Is64Bit ? X86::RBP : X86::EBP) && "Invalid frame pointer!");
612 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
H A DX86MCCodeEmitter.cpp466 if (Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
509 // If the base is not EBP/ESP and there is no displacement, use simple
511 // encoding for [EBP] with no displacement means [disp32] so we handle it
513 if (Disp.isImm() && Disp.getImm() == 0 && BaseRegNo != N86::EBP) {
563 BaseRegNo != N86::EBP) {
569 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
573 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
/external/qemu/target-i386/
H A Dcpu.h1047 #undef EBP macro
1048 #define EBP (env->regs[R_EBP]) macro
H A Dseg_helper.c293 cpu_stl_kernel(env, env->tr.base + (0x28 + 5 * 4), EBP);
307 cpu_stw_kernel(env, env->tr.base + (0x12 + 5 * 2), EBP);
359 EBP = new_regs[5];
1163 ebp = EBP;
1195 ebp = EBP;
/external/libunwind/src/ptrace/
H A D_UPT_reg_offset.c262 UNW_R_OFF(EBP, ebp)
/external/llvm/lib/Target/X86/AsmParser/
H A DX86Operand.h347 case X86::RBP: return X86::EBP;
/external/qemu-pc-bios/bochs/
H A Dbochs.h59 #undef EBP macro
/external/llvm/lib/Target/X86/
H A DX86CodeEmitter.cpp523 // If the base is not EBP/ESP and there is no displacement, use simple
525 // encoding for [EBP] with no displacement means [disp32] so we handle it
527 if (!DispForReloc && DispVal == 0 && BaseRegNo != N86::EBP) {
560 } else if (DispVal == 0 && BaseRegNo != N86::EBP) {
566 ForceDisp8 = true; // Make sure to force 8 bit disp if Base=EBP
H A DX86FrameLowering.cpp547 // Get the offset of the stack slot for the EBP register, which is
552 // Save EBP/RBP into the appropriate stack slot.
558 // Mark the place where EBP/RBP was saved.
581 // Update EBP with the new base value.
589 // Define the current CFA to use the EBP/RBP register.
899 // Pop EBP.
1040 // Skip the saved EBP.
1048 // Skip the saved EBP.
1059 // Skip the saved EBP.
1255 // [EBP]
[all...]
H A DX86FastISel.cpp2210 (FrameReg == X86::EBP && VT == MVT::i32)) &&
2304 // although ESP/EBP should be the only ones at the moment.
H A DX86ISelLowering.cpp3054 // (possible EBP)
14610 (FrameReg == X86::EBP && VT == MVT::i32)) &&
14651 (FrameReg == X86::EBP && PtrVT == MVT::i32)) &&
17870 unsigned FP = (PVT == MVT::i64) ? X86::RBP : X86::EBP;
22733 case X86::BP: DestReg = X86::EBP; break;
/external/chromium_org/third_party/mesa/src/src/mesa/x86/
H A Dassyntax.h110 #define EBP bp macro
172 #define EBP %ebp macro
840 #define P_EBP EBP
841 #define L_EBP EBP
/external/mesa3d/src/mesa/x86/
H A Dassyntax.h110 #define EBP bp macro
172 #define EBP %ebp macro
840 #define P_EBP EBP
841 #define L_EBP EBP
/external/qemu/
H A Dcpu-exec.c33 #undef EBP macro
/external/valgrind/main/VEX/test/
H A Dtest-amd64.c1357 #define REG_EBP EBP
H A Dtest-i386.c1317 #define REG_EBP EBP
/external/strace/
H A Dprocess.c1291 XLAT(4*EBP),
/external/valgrind/main/memcheck/
H A Dmc_machine.c703 if (o == GOF(EBP) && is124) return o;

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