Searched refs:bits (Results 976 - 1000 of 1594) sorted by relevance

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/external/pixman/pixman/
H A Dpixman-implementation.c265 uint32_t * bits,
277 ((*imp->fill) (imp, bits, stride, bpp, x, y, width, height, filler)))
264 _pixman_implementation_fill(pixman_implementation_t *imp, uint32_t * bits, int stride, int bpp, int x, int y, int width, int height, uint32_t filler) argument
/external/skia/tests/
H A DDrawBitmapRectTest.cpp91 unsigned bits) {
92 return SkTreatAsSprite(mat, size.width(), size.height(), bits);
90 treat_as_sprite(const SkMatrix& mat, const SkISize& size, unsigned bits) argument
H A DRegionTest.cpp197 int bits = 6; local
198 int shift = 32 - bits;
/external/chromium_org/content/common/gpu/media/
H A Dvaapi_video_encode_accelerator.cc352 #define SPS_TO_SP_FS(a) seq_param.seq_fields.bits.a = current_sps_.a;
372 #define SPS_TO_SP_VF(a) seq_param.vui_fields.bits.a = current_sps_.a;
410 pic_param.pic_fields.bits.idr_pic_flag = current_pic_.idr;
411 pic_param.pic_fields.bits.reference_pic_flag = current_pic_.ref;
412 #define PPS_TO_PP_PF(a) pic_param.pic_fields.bits.a = current_pps_.a;
461 rate_control_param.rc_flags.bits.disable_frame_skip = true;
H A Dvaapi_h264_decoder.cc246 #define FROM_SPS_TO_PP_SF(a) pic_param.seq_fields.bits.a = sps->a;
247 #define FROM_SPS_TO_PP_SF2(a, b) pic_param.seq_fields.bits.b = sps->a;
255 pic_param.seq_fields.bits.MinLumaBiPredSize8x8 = (sps->level_idc >= 31);
273 #define FROM_PPS_TO_PP_PF(a) pic_param.pic_fields.bits.a = pps->a;
274 #define FROM_PPS_TO_PP_PF2(a, b) pic_param.pic_fields.bits.b = pps->a;
280 pic_param.pic_fields.bits.field_pic_flag = 0;
286 pic_param.pic_fields.bits.reference_pic_flag = curr_pic_->ref;
/external/chromium_org/third_party/libvpx/source/libvpx/vp9/common/arm/neon/
H A Dvp9_iht4x4_add_neon.asm18 ; Parallel 1D IDCT on all the columns of a 4x4 16bits data matrix which are
52 ; Parallel 1D IADST on all the columns of a 4x4 16bits data matrix which
133 ; Transpose a 4x4 16bits data matrix. Datas are loaded in d16-d19.
/external/libvpx/libvpx/vp9/common/arm/neon/
H A Dvp9_iht4x4_add_neon.asm18 ; Parallel 1D IDCT on all the columns of a 4x4 16bits data matrix which are
52 ; Parallel 1D IADST on all the columns of a 4x4 16bits data matrix which
133 ; Transpose a 4x4 16bits data matrix. Datas are loaded in d16-d19.
/external/zlib/src/contrib/pascal/
H A Dzlibpas.pas123 function deflatePending(var strm: z_stream; var pending: Integer; var bits: Integer): Integer;
124 function deflatePrime(var strm: z_stream; bits, value: Integer): Integer;
133 function inflatePrime(var strm: z_stream; bits, value: Integer): Integer;
/external/chromium_org/v8/src/arm64/
H A Dmacro-assembler-arm64-inl.h16 #include "src/base/bits.h"
34 // Assumes that Smis are shifted by 32 bits and little endianness.
1245 // 24-bits immediates or values of 'space' that can be encoded in one
1386 // Check if both tag bits are clear.
1524 DCHECK(base::bits::IsPowerOfTwo64(unit_size));
1542 DCHECK(unit_size == 0 || base::bits::IsPowerOfTwo64(unit_size));
1582 DCHECK(base::bits::IsPowerOfTwo64(unit_size));
1603 DCHECK(unit_size == 0 || base::bits::IsPowerOfTwo64(unit_size));
1645 int bits = reg.SizeInBits(); local
1646 DCHECK(CountSetBits(bit_pattern, bits) >
1659 int bits = reg.SizeInBits(); local
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/external/libunwind/doc/
H A Dlibunwind-ia64.tex20 \Type{unw\_word\_t} is always defined to be 64 bits wide (independent
32 One special feature of IA-64 is the use of NaT bits to support
33 speculative execution. Often, NaT bits are thought of as the ``65-th
36 NaT-bits like separate boolean registers, whose 64-bit value is either
120 \item[\Const{UNW\_IA64\_NAT}:] The base-index for the NaT bits of the
/external/openssl/crypto/bn/asm/
H A Dsparcv9-mont.pl53 $bits=32;
54 for (@ARGV) { $bits=64 if (/\-m64/ || /\-xarch\=v9/); }
55 if ($bits==64) { $bias=2047; $frame=192; }
63 $mask="%g1"; # 32 bits, what a waste...
84 cmp %o5,4 ! 128 bits minimum
108 be,pt `$bits==32?"%icc":"%xcc"`,.Lbn_sqr_mont
H A Dbn-mips.S648 srl $3,$6,4*4 # bits
657 srl $9,$4,4*4 # bits
664 sll $15,$4,4*4 # bits
665 srl $1,$5,4*4 # bits
685 sll $5,4*4 # bits
687 sll $2,$8,4*4 # bits
690 srl $9,$4,4*4 # bits
697 sll $15,$4,4*4 # bits
698 srl $1,$5,4*4 # bits
/external/qemu/distrib/zlib-1.2.8/
H A Ddeflate.c230 * output size for (length,distance) codes is <= 24 bits.
450 int ZEXPORT deflatePending (strm, pending, bits)
452 int *bits;
458 if (bits != Z_NULL)
459 *bits = strm->state->bi_valid;
464 int ZEXPORT deflatePrime (strm, bits, value)
466 int bits;
478 if (put > bits)
479 put = bits;
484 bits
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/external/zlib/src/
H A Ddeflate.c230 * output size for (length,distance) codes is <= 24 bits.
450 int ZEXPORT deflatePending (strm, pending, bits)
452 int *bits;
458 if (bits != Z_NULL)
459 *bits = strm->state->bi_valid;
464 int ZEXPORT deflatePrime (strm, bits, value)
466 int bits;
478 if (put > bits)
479 put = bits;
484 bits
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/external/chromium_org/third_party/boringssl/src/crypto/bn/
H A Dbn_test.c775 int bits = (200 * (i + 1)) / num2; local
777 if (bits == 0)
779 BN_rand(&n, bits, 0, 1);
1277 static const int bits = 10; local
1282 if (!BN_generate_prime_ex(&r, bits, 0, NULL, NULL, NULL)) {
1285 if (BN_num_bits(&r) != bits) {
1286 BIO_printf(bp, "Expected %d bit prime, got %d bit number\n", bits,
1304 if (!BN_rand(n, 1024 /* bit length */, -1 /* no modification of top bits */,
1319 if (!BN_rand(n, 1024 /* bit length */, -1 /* no modification of top bits */,
/external/chromium_org/third_party/boringssl/src/crypto/cipher/
H A De_aes.c144 int vpaes_set_encrypt_key(const uint8_t *userKey, int bits, AES_KEY *key);
145 int vpaes_set_decrypt_key(const uint8_t *userKey, int bits, AES_KEY *key);
159 int vpaes_set_encrypt_key(const uint8_t *userKey, int bits, AES_KEY *key) { argument
162 int vpaes_set_decrypt_key(const uint8_t *userKey, int bits, AES_KEY *key) { argument
179 int aesni_set_encrypt_key(const uint8_t *userKey, int bits, AES_KEY *key);
180 int aesni_set_decrypt_key(const uint8_t *userKey, int bits, AES_KEY *key);
213 int aesni_set_encrypt_key(const uint8_t *userKey, int bits, AES_KEY *key) { argument
/external/chromium_org/third_party/boringssl/src/crypto/aes/
H A Daes.c560 int AES_set_encrypt_key(const uint8_t *key, unsigned bits, AES_KEY *aeskey) { argument
569 switch (bits) {
589 if (bits == 128) {
607 if (bits == 192) {
627 if (bits == 256) {
655 int AES_set_decrypt_key(const uint8_t *key, unsigned bits, AES_KEY *aeskey) { argument
661 status = AES_set_encrypt_key(key, bits, aeskey);
1093 int asm_AES_set_encrypt_key(const uint8_t *key, unsigned bits, AES_KEY *aeskey);
1094 int AES_set_encrypt_key(const uint8_t *key, unsigned bits, AES_KEY *aeskey) { argument
1095 return asm_AES_set_encrypt_key(key, bits, aeske
1099 AES_set_decrypt_key(const uint8_t *key, unsigned bits, AES_KEY *aeskey) argument
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/external/qemu/disas/
H A Darm.c103 %c print condition code (always bits 28-31 in ARM mode)
109 %I print cirrus signed shift immediate: bits 0..3|4..6
141 %i print 5-bit immediate in bits 8,3..0
787 %c print condition code (always bits 28-31)
790 %p print 'p' iff bits 12-15 are 15
807 %e print arm SMI operand (bits 0..7,8..19).
1076 %S print Thumb register (bits 3..5 as high number if bit 6 set)
1077 %D print Thumb register (bits 0..2 as high number if bit 7 set)
1221 We adopt the convention that hw1 is the high 16 bits of .value and
1222 .mask, hw2 the low 16 bits
1571 int bits; local
2448 int bits = 0; local
3373 unsigned int bits = 0, imm, imm8, mod; local
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c105 * Expand the relevant bits of mask_input to a n*4-dword mask for the
123 LLVMValueRef bits[16]; local
131 assert(fs_type.length <= Elements(bits));
171 bits[4*i + 0] = LLVMConstInt(i32t, 1 << (j + 0), 0);
172 bits[4*i + 1] = LLVMConstInt(i32t, 1 << (j + 1), 0);
173 bits[4*i + 2] = LLVMConstInt(i32t, 1 << (j + 4), 0);
174 bits[4*i + 3] = LLVMConstInt(i32t, 1 << (j + 5), 0);
176 mask = LLVMBuildAnd(builder, mask, LLVMConstVector(bits, fs_type.length), "");
944 i*fs_type.length*zs_format_desc->block.bits/8,
974 unsigned depth_bits = zs_format_desc->block.bits/
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/external/elfutils/0.153/src/
H A Dreadelf.c2790 the architecture. It's 32 bits for 32 bit archs, and 64 bits for
2821 /* Count bits in bitmask. */
2837 Bitmask Size: %zu bytes %" PRIuFAST32 "%% bits set 2nd hash shift: %u\n"),
4781 char name[REGNAMESZ], int *bits, int *type)
4787 bits ?: &ignore, type ?: &ignore);
4791 if (bits != NULL)
4792 *bits = loc->bits;
4799 if (bits !
4780 register_info(Ebl *ebl, unsigned int regno, const Ebl_Register_Location *loc, char name[REGNAMESZ], int *bits, int *type) argument
7820 int bits; local
7912 int bits; member in struct:register_info
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/external/llvm/include/llvm/Support/
H A DCommandLine.h1461 unsigned *Location; // Where to store the bits...
1497 // Define how to hold bits. Since we can inherit from a class, we do so.
1498 // This makes us exactly compatible with the bits in all cases that it is used.
1502 unsigned Bits; // Where to store the bits...
1528 // bits - A bit vector of command options.
1532 class bits : public Option, public bits_storage<DataType, Storage> {
1561 // Unimplemented: bits options don't currently store their default values.
1579 explicit bits(const M0t &M0) : Option(ZeroOrMore, NotHidden) {
1585 bits(const M0t &M0, const M1t &M1) : Option(ZeroOrMore, NotHidden) {
1591 bits(cons
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/external/mesa3d/src/gallium/drivers/llvmpipe/
H A Dlp_state_fs.c105 * Expand the relevant bits of mask_input to a n*4-dword mask for the
123 LLVMValueRef bits[16]; local
131 assert(fs_type.length <= Elements(bits));
171 bits[4*i + 0] = LLVMConstInt(i32t, 1 << (j + 0), 0);
172 bits[4*i + 1] = LLVMConstInt(i32t, 1 << (j + 1), 0);
173 bits[4*i + 2] = LLVMConstInt(i32t, 1 << (j + 4), 0);
174 bits[4*i + 3] = LLVMConstInt(i32t, 1 << (j + 5), 0);
176 mask = LLVMBuildAnd(builder, mask, LLVMConstVector(bits, fs_type.length), "");
944 i*fs_type.length*zs_format_desc->block.bits/8,
974 unsigned depth_bits = zs_format_desc->block.bits/
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/external/pdfium/core/src/fxcodec/fx_zlib/zlib_v128/
H A Dfx_zlib_deflate.c229 * output size for (length,distance) codes is <= 24 bits.
452 int *bits)
457 if (bits != Z_NULL)
458 *bits = strm->state->bi_valid;
463 int ZEXPORT deflatePrime (strm, bits, value)
465 int bits;
477 if (put > bits)
478 put = bits;
483 bits -= put;
484 } while (bits);
449 deflatePending( z_streamp strm, unsigned *pending, int *bits) argument
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/external/chromium_org/content/browser/indexed_db/
H A Dindexed_db_callbacks.cc364 std::swap(params->value, value->bits);
411 std::swap(params->value, value->bits);
472 values_bits[i].swap(iter->bits);
518 std::swap(params->value, value->bits);
551 std::swap(params->value, value->bits);
/external/chromium_org/third_party/opus/src/src/
H A Dopus_demo.c48 "<bits per second> [options] <input> <output>\n", argv[0]);
245 double bits=0.0, bits_max=0.0, bits_act=0.0, bits2=0.0, nrg; local
841 /* count bits */
842 bits += len[toggle]*8;
863 1e-3*bits*sampling_rate/tot_samples);
870 1e-3*sqrt(bits2/count - bits*bits/(count*(double)count))*sampling_rate/frame_size);

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