Searched refs:instruction (Results 101 - 125 of 654) sorted by relevance

1234567891011>>

/external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/
H A DInstruction.java32 package org.jf.dexlib2.iface.instruction;
37 * This class represents a generic instruction.
39 * There are two categories of sub-interfaces of this interface. The dexlib2.iface.instruction.* interfaces are set of
40 * generic categories of instructions, while the dexlib2.iface.instruction.formats.* interfaces each represent a
41 * specific instruction format, and are typically built up as a composite of generic instruction interfaces.
45 * Gets the opcode of this instruction.
47 * @return The Opcode of this instruction.
52 * Gets the size of this instruction.
54 * @return The size of this instruction, a
[all...]
/external/llvm/test/MC/ARM/
H A Ddirective-arch_extension-simd.s20 @ CHECK-V7: error: instruction requires: FPARMv8
22 @ CHECK-V7: error: instruction requires: FPARMv8
25 @ CHECK-V7: error: instruction requires: FPARMv8
27 @ CHECK-V7: error: instruction requires: FPARMv8
30 @ CHECK-V7: error: instruction requires: FPARMv8
32 @ CHECK-V7: error: instruction requires: FPARMv8
34 @ CHECK-V7: error: instruction requires: FPARMv8
36 @ CHECK-V7: error: instruction requires: FPARMv8
38 @ CHECK-V7: error: instruction requires: FPARMv8
40 @ CHECK-V7: error: instruction require
[all...]
H A Ddirective-arch_extension-crypto.s20 @ CHECK-V7: error: instruction requires: crypto armv8
23 @ CHECK-V7: error: instruction requires: crypto armv8
25 @ CHECK-V7: error: instruction requires: crypto armv8
27 @ CHECK-V7: error: instruction requires: crypto armv8
29 @ CHECK-V7: error: instruction requires: crypto armv8
32 @ CHECK-V7: error: instruction requires: crypto armv8
34 @ CHECK-V7: error: instruction requires: crypto armv8
36 @ CHECK-V7: error: instruction requires: crypto armv8
39 @ CHECK-V7: error: instruction requires: crypto armv8
41 @ CHECK-V7: error: instruction require
[all...]
H A Dv8_IT_manual.s11 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
14 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
18 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
30 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
34 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
42 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
46 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
50 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
59 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction in IT block
71 @ CHECK: [[@LINE+2]]:1: warning: deprecated instruction i
[all...]
H A Dnot-armv4.s4 @ CHECK: error: instruction requires: armv5t
7 @ CHECK: error: instruction requires: armv6t2
H A Dobsolete-v8.s4 @ CHECK: instruction requires: armv7 or earlier
7 @ CHECK: instruction requires: armv7 or earlier
/external/smali/dexlib2/src/main/java/org/jf/dexlib2/immutable/instruction/
H A DImmutableInstruction22b.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction22b;
58 public static ImmutableInstruction22b of(Instruction22b instruction) { argument
59 if (instruction instanceof ImmutableInstruction22b) {
60 return (ImmutableInstruction22b)instruction;
63 instruction.getOpcode(),
64 instruction.getRegisterA(),
65 instruction.getRegisterB(),
66 instruction.getNarrowLiteral());
H A DImmutableInstruction22c.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction22c;
61 public static ImmutableInstruction22c of(Instruction22c instruction) { argument
62 if (instruction instanceof ImmutableInstruction22c) {
63 return (ImmutableInstruction22c)instruction;
66 instruction.getOpcode(),
67 instruction.getRegisterA(),
68 instruction.getRegisterB(),
69 instruction.getReference());
H A DImmutableInstruction22cs.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction22cs;
58 public static ImmutableInstruction22cs of(Instruction22cs instruction) { argument
59 if (instruction instanceof ImmutableInstruction22cs) {
60 return (ImmutableInstruction22cs)instruction;
63 instruction.getOpcode(),
64 instruction.getRegisterA(),
65 instruction.getRegisterB(),
66 instruction.getFieldOffset());
H A DImmutableInstruction22s.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction22s;
58 public static ImmutableInstruction22s of(Instruction22s instruction) { argument
59 if (instruction instanceof ImmutableInstruction22s) {
60 return (ImmutableInstruction22s)instruction;
63 instruction.getOpcode(),
64 instruction.getRegisterA(),
65 instruction.getRegisterB(),
66 instruction.getNarrowLiteral());
H A DImmutableInstruction22t.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction22t;
58 public static ImmutableInstruction22t of(Instruction22t instruction) { argument
59 if (instruction instanceof ImmutableInstruction22t) {
60 return (ImmutableInstruction22t)instruction;
63 instruction.getOpcode(),
64 instruction.getRegisterA(),
65 instruction.getRegisterB(),
66 instruction.getCodeOffset());
H A DImmutableInstruction23x.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction23x;
58 public static ImmutableInstruction23x of(Instruction23x instruction) { argument
59 if (instruction instanceof ImmutableInstruction23x) {
60 return (ImmutableInstruction23x)instruction;
63 instruction.getOpcode(),
64 instruction.getRegisterA(),
65 instruction.getRegisterB(),
66 instruction.getRegisterC());
H A DImmutableInstruction3rc.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction3rc;
62 public static ImmutableInstruction3rc of(Instruction3rc instruction) { argument
63 if (instruction instanceof ImmutableInstruction3rc) {
64 return (ImmutableInstruction3rc)instruction;
67 instruction.getOpcode(),
68 instruction.getStartRegister(),
69 instruction.getRegisterCount(),
70 instruction.getReference());
H A DImmutableInstruction3rmi.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction3rmi;
58 public static ImmutableInstruction3rmi of(Instruction3rmi instruction) { argument
59 if (instruction instanceof ImmutableInstruction3rmi) {
60 return (ImmutableInstruction3rmi)instruction;
63 instruction.getOpcode(),
64 instruction.getStartRegister(),
65 instruction.getRegisterCount(),
66 instruction.getInlineIndex());
H A DImmutableInstruction3rms.java32 package org.jf.dexlib2.immutable.instruction;
36 import org.jf.dexlib2.iface.instruction.formats.Instruction3rms;
58 public static ImmutableInstruction3rms of(Instruction3rms instruction) { argument
59 if (instruction instanceof ImmutableInstruction3rms) {
60 return (ImmutableInstruction3rms)instruction;
63 instruction.getOpcode(),
64 instruction.getStartRegister(),
65 instruction.getRegisterCount(),
66 instruction.getVtableIndex());
/external/llvm/test/MC/Mips/mips3/
H A Dinvalid-mips4.s8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ldxc1 $f8,$s7($15) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 lwxc1 $f12,$s1($s8) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 movf $gp,$8,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 movf $gp,$8,$fcc7 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 movf.d $f6,$f11,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 movf.d $f6,$f11,$fcc5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
16 movf.s $f23,$f5,$fcc0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 movf.s $f23,$f5,$fcc6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
[all...]
/external/llvm/test/MC/Mips/mips5/
H A Dinvalid-mips64.s8 clo $11,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 dclz $s0,$25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 jr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 jalr.hb $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 jalr.hb $4, $5 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 madd $s6,$13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 madd $zero,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
/external/llvm/test/MC/Mips/mips4/
H A Dinvalid-mips64r2.s8 clo $t3,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 clz $sp,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 dclz $s0,$t9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 deret # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 ei $t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
/external/llvm/test/MC/Mips/mips64/
H A Dinvalid-mips64r2.s8 di $s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 drotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 drotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 drotr32 $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 drotr32 $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 drotrv $1,$14,$15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dsbh $v1,$14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 ei $14 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 madd.s $f1,$f31,$f19,$f25 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
/external/llvm/test/MC/Mips/mips64r6/
H A Dinvalid-mips64.s8 addi $13,$9,26322 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 bgezal $0, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 bgezal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 bltzal $6, 21100 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 daddi $sp,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dadd $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 dadd $sp,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dmult $s7,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 dmultu $a1,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
/external/llvm/test/MC/Mips/mips2/
H A Dinvalid-mips5.s8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
H A Dinvalid-mips3.s8 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
9 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
10 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 daddiu $k0,$s6,-4586 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddu $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
H A Dinvalid-mips4.s8 bc1f $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
9 bc1t $fcc1, 4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
10 ceil.l.d $f1,$f3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
11 ceil.l.s $f18,$f13 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
12 cvt.d.l $f4,$f16 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
13 cvt.l.d $f24,$f15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
14 cvt.l.s $f11,$f29 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
15 cvt.s.l $f15,$f30 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
16 dadd $s3,$at,$ra # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
17 daddi $sp,$s4,-27705 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction require
[all...]
/external/llvm/test/MC/Mips/mips32r6/
H A Dinvalid-mips5-wrong-error.s8 bc1any2f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
9 bc1any2t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
10 bc1any4f $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
11 bc1any4t $fcc2,4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: Unknown instruction
/external/smali/dexlib2/src/main/java/org/jf/dexlib2/iface/instruction/formats/
H A DArrayPayload.java32 package org.jf.dexlib2.iface.instruction.formats;
34 import org.jf.dexlib2.iface.instruction.PayloadInstruction;

Completed in 195 milliseconds

1234567891011>>