/external/llvm/test/MC/Mips/mips32/ |
H A D | invalid-mips64.s | 8 dclo $s2,$a2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 dclz $s0,$t9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips32r2/ |
H A D | invalid-mips64r2.s | 8 dsbh $v1,$t6 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 dshd $v0,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips32r6/ |
H A D | invalid-mips5.s | 8 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 suxc1 $f12,$k1($13) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips4/ |
H A D | invalid-mips32.s | 9 sync 0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 sync 1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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H A D | invalid-mips5.s | 8 luxc1 $f19,$s6($s5) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 9 suxc1 $f12,$k1($t1) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/llvm/test/MC/Mips/mips5/ |
H A D | invalid-mips32.s | 9 sync 0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled 10 sync 1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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/external/proguard/src/proguard/optimize/peephole/ |
H A D | UnreachableCodeRemover.java | 27 import proguard.classfile.instruction.Instruction; 28 import proguard.classfile.instruction.visitor.InstructionVisitor; 123 public void visitAnyInstruction(Clazz clazz, Method method, CodeAttribute codeAttribute, int offset, Instruction instruction) argument 127 System.out.println(" "+(reachableCodeMarker.isReachable(offset) ? "+" : "-")+" "+instruction.toString(offset)); 130 // Is this instruction unreachable? 136 // Visit the instruction, if required. 139 instruction.accept(clazz, method, codeAttribute, offset, extraInstructionVisitor);
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/external/valgrind/main/none/tests/mips64/ |
H A D | rotate_swap.c | 3 #define TESTINST_DROTR(instruction, in, SA) \ 9 instruction" $t0, $t1, "#SA "\n\t" \ 16 instruction, (long long) in, out, SA); \ 19 #define TESTINST_DROTRV(instruction, in, SA) \ 26 instruction" $t0, $t1, $t2" "\n\t" \ 33 instruction, (long long) in, out, SA); \ 36 #define TESTINST_DSWAP(instruction, in) \ 43 instruction" $t0, $t1" "\n\t" \ 50 instruction, (long long) in, out); \
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H A D | branches.c | 130 #define TESTINST4(instruction, RDval, RSval, RTval, RD, RS, RT) \ 138 instruction" $"#RS", $"#RT", end"instruction#RDval "\n\t" \ 141 "end"instruction#RDval":" "\n\t" \ 149 printf(instruction" :: out: %d, RDval: %d, RSval: %d, RTval: %d\n", \ 153 #define TESTINST5(instruction, RDval, RSval, RD, RS) \ 160 instruction" $"#RS", end"instruction#RDval "\n\t" \ 163 "end"instruction#RDval":" "\n\t" \ 171 printf(instruction" [all...] |
/external/llvm/test/MC/ARM/ |
H A D | thumbv7m.s | 7 @ These tests test instruction encodings specific to ARMv7m. 33 @ CHECK-V6M: error: invalid operand for instruction 35 @ CHECK-V6M: error: invalid operand for instruction 37 @ CHECK-V6M: error: invalid operand for instruction 39 @ CHECK-V6M: error: invalid operand for instruction 41 @ CHECK-V6M: error: invalid operand for instruction 43 @ CHECK-V6M: error: invalid operand for instruction
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H A D | diagnostics.s | 8 @ 's' bit on an instruction that can't accept it. 10 @ CHECK-ERRORS: error: instruction 'mls' can not set flags, 96 @ CHECK-ERRORS: error: invalid operand for instruction 98 @ Out of range immediates for v8 HLT instruction. 101 @CHECK-ERRORS-V8: error: invalid operand for instruction 104 @CHECK-ERRORS-V8: error: invalid operand for instruction 108 @ Illegal condition code for v8 HLT instruction. 111 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified 114 @CHECK-ERRORS-V8: error: instruction 'hlt' is not predicable, but condition code specified 126 @ CHECK-ERRORS: error: invalid operand for instruction [all...] |
H A D | deprecated-v8.s | 31 @ CHECK-THUMBV8: warning: deprecated instruction in IT block 36 @ CHECK-ARMV8: warning: applying IT instruction to more than one subsequent instruction is deprecated 37 @ CHECK-THUMBV8: warning: applying IT instruction to more than one subsequent instruction is deprecated 41 @ CHECK-THUMBV8: warning: deprecated instruction in IT block 44 revge r0, r0 // invalid instruction 45 @ CHECK-THUMBV8: warning: deprecated instruction in IT block 49 @ CHECK-THUMBV8: warning: deprecated instruction in IT block
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_build.c | 578 * instruction 584 struct tgsi_instruction instruction; local 586 instruction.Type = TGSI_TOKEN_TYPE_INSTRUCTION; 587 instruction.NrTokens = 0; 588 instruction.Opcode = TGSI_OPCODE_MOV; 589 instruction.Saturate = TGSI_SAT_NONE; 590 instruction.Predicate = 0; 591 instruction.NumDstRegs = 1; 592 instruction.NumSrcRegs = 1; 593 instruction 608 struct tgsi_instruction instruction; local 628 instruction_grow( struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 656 tgsi_build_instruction_predicate(int index, unsigned negate, unsigned swizzleX, unsigned swizzleY, unsigned swizzleZ, unsigned swizzleW, struct tgsi_instruction *instruction, struct tgsi_header *header) argument 692 tgsi_build_instruction_label( unsigned label, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 722 tgsi_build_instruction_texture( unsigned texture, unsigned num_offsets, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 758 tgsi_build_texture_offset( int index, int file, int swizzle_x, int swizzle_y, int swizzle_z, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 798 tgsi_build_src_register( unsigned file, unsigned swizzle_x, unsigned swizzle_y, unsigned swizzle_z, unsigned swizzle_w, unsigned negate, unsigned absolute, unsigned indirect, unsigned dimension, int index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 865 tgsi_build_dimension( unsigned indirect, unsigned index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 899 tgsi_build_dst_register( unsigned file, unsigned mask, unsigned indirect, unsigned dimension, int index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 971 struct tgsi_instruction *instruction; local [all...] |
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_build.c | 578 * instruction 584 struct tgsi_instruction instruction; local 586 instruction.Type = TGSI_TOKEN_TYPE_INSTRUCTION; 587 instruction.NrTokens = 0; 588 instruction.Opcode = TGSI_OPCODE_MOV; 589 instruction.Saturate = TGSI_SAT_NONE; 590 instruction.Predicate = 0; 591 instruction.NumDstRegs = 1; 592 instruction.NumSrcRegs = 1; 593 instruction 608 struct tgsi_instruction instruction; local 628 instruction_grow( struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 656 tgsi_build_instruction_predicate(int index, unsigned negate, unsigned swizzleX, unsigned swizzleY, unsigned swizzleZ, unsigned swizzleW, struct tgsi_instruction *instruction, struct tgsi_header *header) argument 692 tgsi_build_instruction_label( unsigned label, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 722 tgsi_build_instruction_texture( unsigned texture, unsigned num_offsets, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 758 tgsi_build_texture_offset( int index, int file, int swizzle_x, int swizzle_y, int swizzle_z, struct tgsi_token *prev_token, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 798 tgsi_build_src_register( unsigned file, unsigned swizzle_x, unsigned swizzle_y, unsigned swizzle_z, unsigned swizzle_w, unsigned negate, unsigned absolute, unsigned indirect, unsigned dimension, int index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 865 tgsi_build_dimension( unsigned indirect, unsigned index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 899 tgsi_build_dst_register( unsigned file, unsigned mask, unsigned indirect, unsigned dimension, int index, struct tgsi_instruction *instruction, struct tgsi_header *header ) argument 971 struct tgsi_instruction *instruction; local [all...] |
/external/smali/baksmali/src/main/java/org/jf/baksmali/Adaptors/Format/ |
H A D | PackedSwitchMethodItem.java | 33 import org.jf.dexlib2.iface.instruction.SwitchElement; 34 import org.jf.dexlib2.iface.instruction.formats.PackedSwitchPayload; 46 public PackedSwitchMethodItem(MethodDefinition methodDef, int codeAddress, PackedSwitchPayload instruction) { argument 47 super(methodDef, codeAddress, instruction); 57 for (SwitchElement switchElement: instruction.getSwitchElements()) { 68 for (SwitchElement switchElement: instruction.getSwitchElements()) {
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H A D | SparseSwitchMethodItem.java | 33 import org.jf.dexlib2.iface.instruction.SwitchElement; 34 import org.jf.dexlib2.iface.instruction.formats.SparseSwitchPayload; 45 public SparseSwitchMethodItem(MethodDefinition methodDef, int codeAddress, SparseSwitchPayload instruction) { argument 46 super(methodDef, codeAddress, instruction); 52 for (SwitchElement switchElement: instruction.getSwitchElements()) { 60 for (SwitchElement switchElement: instruction.getSwitchElements()) {
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/external/valgrind/main/none/tests/ppc64/ |
H A D | test_isa_2_06_part2.stdout.exp | 695 Test xxsel instruction 699 Test xxspltw instruction 943 Test stdbrx instruction
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/external/chromium_org/v8/src/ |
H A D | disasm.h | 38 // Writes one disassembled instruction into 'buffer' (0-terminated). 39 // Returns the length of the disassembled machine instruction in bytes. 40 int InstructionDecode(v8::internal::Vector<char> buffer, byte* instruction); 42 // Returns -1 if instruction does not mark the beginning of a constant pool, 44 int ConstantPoolSizeAt(byte* instruction);
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/external/llvm/test/MC/Sparc/ |
H A D | sparcv9-instructions.s | 4 ! V8: error: invalid instruction mnemonic 9 ! V8: error: invalid instruction mnemonic 14 ! V8: error: invalid instruction mnemonic 19 ! V8: error: invalid instruction mnemonic
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/external/oprofile/events/mips/vr5500/ |
H A D | events | 8 event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction 9 event:0x3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction 10 event:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction 11 event:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction
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/external/proguard/src/proguard/classfile/instruction/visitor/ |
H A D | InstructionVisitor.java | 21 package proguard.classfile.instruction.visitor; 25 import proguard.classfile.instruction.*;
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/external/smali/dexlib2/src/main/java/org/jf/dexlib2/builder/instruction/ |
H A D | BuilderInstruction11n.java | 32 package org.jf.dexlib2.builder.instruction; 37 import org.jf.dexlib2.iface.instruction.formats.Instruction11n;
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H A D | BuilderInstruction11x.java | 32 package org.jf.dexlib2.builder.instruction; 37 import org.jf.dexlib2.iface.instruction.formats.Instruction11x;
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H A D | BuilderInstruction12x.java | 32 package org.jf.dexlib2.builder.instruction; 37 import org.jf.dexlib2.iface.instruction.formats.Instruction12x;
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H A D | BuilderInstruction21c.java | 32 package org.jf.dexlib2.builder.instruction; 37 import org.jf.dexlib2.iface.instruction.formats.Instruction21c;
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