Searched defs:OS (Results 126 - 150 of 343) sorted by relevance

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/external/llvm/lib/Analysis/
H A DSparsePropagation.cpp32 void AbstractLatticeFunction::PrintValue(LatticeVal V, raw_ostream &OS) { argument
34 OS << "undefined";
36 OS << "overdefined";
38 OS << "untracked";
40 OS << "unknown lattice value";
329 void SparseSolver::Print(Function &F, raw_ostream &OS) const {
330 OS << "\nFUNCTION: " << F.getName() << "\n";
333 OS << "INFEASIBLE: ";
334 OS << "\t";
336 OS << B
340 LatticeFunc->PrintValue(getLatticeState(I), OS); local
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/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp345 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { argument
346 OS << (const void*)this << ": ";
349 if (i) OS << ",";
351 OS << "ch";
353 OS << getValueType(i).getEVTString();
355 OS << " = " << getOperationName(G);
358 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { argument
361 OS << "<";
362 OS << "Mem:";
365 OS << **
560 printr(raw_ostream &OS, const SelectionDAG *G) const argument
566 DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, const SelectionDAG *G, VisitedSDNodeSet &once) argument
612 printrWithDepthHelper(raw_ostream &OS, const SDNode *N, const SelectionDAG *G, unsigned depth, unsigned indent) argument
634 printrWithDepth(raw_ostream &OS, const SelectionDAG *G, unsigned depth) const argument
639 printrFull(raw_ostream &OS, const SelectionDAG *G) const argument
653 print(raw_ostream &OS, const SelectionDAG *G) const argument
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/external/llvm/lib/DebugInfo/
H A DDWARFFormValue.cpp362 DWARFFormValue::dump(raw_ostream &OS, const DWARFUnit *cu) const { argument
369 case DW_FORM_addr: OS << format("0x%016" PRIx64, uvalue); break;
371 OS << format(" indexed (%8.8x) address = ", (uint32_t)uvalue);
374 OS << format("0x%016" PRIx64, Address);
376 OS << "<no .debug_addr section>";
379 case DW_FORM_flag_present: OS << "true"; break;
381 case DW_FORM_data1: OS << format("0x%02x", (uint8_t)uvalue); break;
382 case DW_FORM_data2: OS << format("0x%04x", (uint16_t)uvalue); break;
383 case DW_FORM_data4: OS << format("0x%08x", (uint32_t)uvalue); break;
385 case DW_FORM_data8: OS << forma
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/external/llvm/lib/MC/
H A DMCSectionMachO.cpp91 raw_ostream &OS,
93 OS << "\t.section\t" << getSegmentName() << ',' << getSectionName();
98 OS << '\n';
107 OS << ',';
108 OS << SectionTypeDescriptors[SectionType].AssemblerName;
111 OS << '\n';
121 OS << ",none," << Reserved2;
122 OS << '\n';
138 OS << Separator;
140 OS << SectionAttrDescriptor
90 PrintSwitchToSection(const MCAsmInfo &MAI, raw_ostream &OS, const MCExpr *Subsection) const argument
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/external/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCTargetDesc.cpp128 raw_ostream &OS, MCCodeEmitter *Emitter,
134 return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
137 return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll, NoExecStack);
126 createMCStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &TAB, raw_ostream &OS, MCCodeEmitter *Emitter, const MCSubtargetInfo &STI, bool RelaxAll, bool NoExecStack) argument
H A DAArch64MachObjectWriter.cpp390 MCObjectWriter *llvm::createAArch64MachObjectWriter(raw_ostream &OS, argument
394 new AArch64MachObjectWriter(CPUType, CPUSubtype), OS,
/external/llvm/lib/Target/ARM/InstPrinter/
H A DARMInstPrinter.cpp70 void ARMInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
71 OS << markup("<reg:")
/external/llvm/lib/Target/Hexagon/
H A DHexagonAsmPrinter.cpp112 raw_ostream &OS) {
120 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
123 printOperand(MI, OpNo, OS);
137 OS << "i";
142 printOperand(MI, OpNo, OS);
109 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS) argument
/external/llvm/lib/Target/Mips/InstPrinter/
H A DMipsInstPrinter.cpp75 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
76 OS << '$' << StringRef(getRegisterName(RegNo)).lower();
125 static void printExpr(const MCExpr *Expr, raw_ostream &OS) { argument
135 ME->print(OS);
145 case MCSymbolRefExpr::VK_Mips_GPREL: OS << "%gp_rel("; break;
146 case MCSymbolRefExpr::VK_Mips_GOT_CALL: OS << "%call16("; break;
147 case MCSymbolRefExpr::VK_Mips_GOT16: OS << "%got("; break;
148 case MCSymbolRefExpr::VK_Mips_GOT: OS << "%got("; break;
149 case MCSymbolRefExpr::VK_Mips_ABS_HI: OS << "%hi("; break;
150 case MCSymbolRefExpr::VK_Mips_ABS_LO: OS << "
255 printAlias(const char *Str, const MCInst &MI, unsigned OpNo, raw_ostream &OS) argument
262 printAlias(const char *Str, const MCInst &MI, unsigned OpNo0, unsigned OpNo1, raw_ostream &OS) argument
271 printAlias(const MCInst &MI, raw_ostream &OS) argument
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/external/llvm/lib/Target/NVPTX/InstPrinter/
H A DNVPTXInstPrinter.cpp39 void NVPTXInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
48 OS << getRegisterName(RegNo);
51 OS << "%p";
54 OS << "%rs";
57 OS << "%r";
60 OS << "%rl";
63 OS << "%f";
66 OS << "%fl";
71 OS << VReg;
74 void NVPTXInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
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/external/llvm/lib/Target/PowerPC/InstPrinter/
H A DPPCInstPrinter.cpp35 void PPCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
36 OS << getRegisterName(RegNo);
/external/llvm/lib/Target/R600/MCTargetDesc/
H A DSIMCCodeEmitter.cpp56 /// \brief Encode the instruction and write it to the OS.
57 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
129 void SIMCCodeEmitter::EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
138 OS.write((uint8_t) ((Encoding >> (8 * i)) & 0xff));
164 OS.write((uint8_t) ((Imm.I >> (8 * j)) & 0xff));
/external/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp43 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
83 EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
90 OS << (char)(Bits >> 24);
/external/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp38 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
103 EncodeInstruction(const MCInst &MI, raw_ostream &OS, argument
111 OS << uint8_t(Bits >> ShiftValue);
H A DSystemZMCTargetDesc.cpp187 raw_ostream &OS,
192 return createELFStreamer(Ctx, MAB, OS, Emitter, RelaxAll, NoExecStack);
184 createSystemZMCObjectStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &MAB, raw_ostream &OS, MCCodeEmitter *Emitter, const MCSubtargetInfo &STI, bool RelaxAll, bool NoExecStack) argument
/external/llvm/lib/Target/SystemZ/
H A DSystemZAsmPrinter.cpp197 raw_ostream &OS) {
201 OS << -int64_t(MI->getOperand(OpNo).getImm());
205 SystemZInstPrinter::printOperand(MO, OS);
214 raw_ostream &OS) {
217 MI->getOperand(OpNo + 2).getReg(), OS);
193 PrintAsmOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS) argument
210 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo, unsigned AsmVariant, const char *ExtraCode, raw_ostream &OS) argument
/external/llvm/lib/Target/X86/InstPrinter/
H A DX86ATTInstPrinter.cpp36 void X86ATTInstPrinter::printRegName(raw_ostream &OS, argument
38 OS << markup("<reg:")
43 void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
49 OS << "\tlock\n";
52 if (!printAliasInstr(MI, OS))
53 printInstruction(MI, OS);
56 printAnnotation(OS, Annot);
H A DX86IntelInstPrinter.cpp31 void X86IntelInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { argument
32 OS << getRegisterName(RegNo);
35 void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS, argument
41 OS << "\tlock\n";
43 printInstruction(MI, OS);
46 printAnnotation(OS, Annot);
/external/llvm/tools/llc/
H A Dllc.cpp115 Triple::OSType OS,
137 if (OS == Triple::Win32)
114 GetOutputStream(const char *TargetName, Triple::OSType OS, const char *ProgName) argument
/external/llvm/utils/TableGen/
H A DCodeEmitterGen.cpp335 void EmitCodeEmitter(RecordKeeper &RK, raw_ostream &OS) { argument
336 emitSourceFileHeader("Machine Code Emitter", OS);
337 CodeEmitterGen(RK).run(OS);
H A DDAGISelEmitter.cpp30 void run(raw_ostream &OS);
122 void DAGISelEmitter::run(raw_ostream &OS) { argument
124 CGP.getTargetInfo().getName() + " target", OS);
126 OS << "// *** NOTE: This file is #included into the middle of the target\n"
164 EmitMatcherTable(TheMatcher, CGP, OS);
170 void EmitDAGISel(RecordKeeper &RK, raw_ostream &OS) { argument
171 DAGISelEmitter(RK).run(OS);
H A DDAGISelMatcher.cpp24 void Matcher::print(raw_ostream &OS, unsigned indent) const { argument
25 printImpl(OS, indent);
27 return Next->print(OS, indent);
30 void Matcher::printOne(raw_ostream &OS) const {
31 printImpl(OS, 0);
108 void ScopeMatcher::printImpl(raw_ostream &OS, unsigned indent) const { argument
109 OS.indent(indent) << "Scope\n";
112 OS.indent(indent+1) << "NULL POINTER\n";
114 getChild(i)->print(OS, indent+2);
118 void RecordMatcher::printImpl(raw_ostream &OS, unsigne argument
122 printImpl(raw_ostream &OS, unsigned indent) const argument
126 printImpl(raw_ostream &OS, unsigned indent) const argument
130 printImpl(raw_ostream &OS, unsigned indent) const argument
134 printImpl(raw_ostream &OS, unsigned indent) const argument
138 printImpl(raw_ostream &OS, unsigned indent) const argument
142 printImpl(raw_ostream &OS, unsigned indent) const argument
146 printImpl(raw_ostream &OS, unsigned indent) const argument
151 printImpl(raw_ostream &OS, unsigned indent) const argument
155 printImpl(raw_ostream &OS, unsigned indent) const argument
159 printImpl(raw_ostream &OS, unsigned indent) const argument
163 printImpl(raw_ostream &OS, unsigned indent) const argument
173 printImpl(raw_ostream &OS, unsigned indent) const argument
178 printImpl(raw_ostream &OS, unsigned indent) const argument
187 printImpl(raw_ostream &OS, unsigned indent) const argument
193 printImpl(raw_ostream &OS, unsigned indent) const argument
197 printImpl(raw_ostream &OS, unsigned indent) const argument
202 printImpl(raw_ostream &OS, unsigned indent) const argument
206 printImpl(raw_ostream &OS, unsigned indent) const argument
210 printImpl(raw_ostream &OS, unsigned indent) const argument
214 printImpl(raw_ostream &OS, unsigned indent) const argument
218 printImpl(raw_ostream &OS, unsigned indent) const argument
222 printImpl(raw_ostream &OS, unsigned indent) const argument
227 printImpl(raw_ostream &OS, unsigned indent) const argument
232 printImpl(raw_ostream &OS, unsigned indent) const argument
236 printImpl(raw_ostream &OS, unsigned indent) const argument
246 printImpl(raw_ostream &OS, unsigned indent) const argument
251 printImpl(raw_ostream &OS, unsigned indent) const argument
255 printImpl(raw_ostream &OS, unsigned indent) const argument
259 printImpl(raw_ostream &OS, unsigned indent) const argument
265 printImpl(raw_ostream &OS, unsigned indent) const argument
278 printImpl(raw_ostream &OS, unsigned indent) const argument
282 printImpl(raw_ostream &OS, unsigned indent) const argument
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H A DOptParserEmitter.cpp97 static raw_ostream &write_cstring(raw_ostream &OS, llvm::StringRef Str) { argument
98 OS << '"';
99 OS.write_escaped(Str);
100 OS << '"';
101 return OS;
108 void EmitOptParser(RecordKeeper &Records, raw_ostream &OS) { argument
114 emitSourceFileHeader("Option Parsing Definitions", OS);
135 OS << "/////////\n";
136 OS << "// Prefixes\n\n";
137 OS << "#ifde
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H A DTableGen.cpp94 bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) { argument
97 OS << Records; // No argument, dump all contents
100 EmitCodeEmitter(Records, OS);
103 EmitRegisterInfo(Records, OS);
106 EmitInstrInfo(Records, OS);
109 EmitCallingConv(Records, OS);
112 EmitAsmWriter(Records, OS);
115 EmitAsmMatcher(Records, OS);
118 EmitDisassembler(Records, OS);
121 EmitPseudoLowering(Records, OS);
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
H A DAMDGPUAsmBackend.cpp24 AMDGPUMCObjectWriter(raw_ostream &OS) : MCObjectWriter(OS, true) { } argument
46 virtual AMDGPUMCObjectWriter *createObjectWriter(raw_ostream &OS) const;
78 raw_ostream &OS) const {
79 return new AMDGPUMCObjectWriter(OS);

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