/external/libvpx/libvpx/vp8/encoder/ppc/ |
H A D | fdct_altivec.asm | 61 .macro two_rows_horiz Dst 73 vperm \Dst, v10, v10, v5 ;# Dest = A0 B0 A1 B1 A2 B2 A3 B3
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_exec.h | 52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
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/external/mesa3d/src/gallium/drivers/i915/ |
H A D | i915_fpc.h | 303 struct i915_full_dst_register Dst[1]; member in struct:i915_full_instruction
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
H A D | radeon_pair_regalloc.c | 388 variable->Dst.Index, writemask); 700 if (var->Dst.File == RC_FILE_INPUT) {
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/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | CStringChecker.cpp | 1333 const Expr *Dst = CE->getArg(0); local 1334 SVal DstVal = state->getSVal(Dst, LCtx); 1336 state = checkNonNull(C, state, Dst, DstVal); 1410 SVal dstStrLength = getCStringLength(C, state, Dst, DstVal); 1509 SVal dstStrLength = getCStringLength(C, state, Dst, DstVal); 1578 QualType ptrTy = Dst->getType(); 1602 state = CheckLocation(C, state, Dst, lastElement, warningMsg); 1619 state = InvalidateBuffer(C, state, Dst, *dstRegVal,
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGBuilder.h | 670 const MachineBasicBlock *Dst) const; 671 void addSuccessorWithWeight(MachineBasicBlock *Src, MachineBasicBlock *Dst,
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H A D | SelectionDAG.cpp | 3884 SDValue Chain, SDValue Dst, 3906 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3969 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 3987 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 4001 SDValue Chain, SDValue Dst, 4020 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 4070 getMemBasePlusOffset(Dst, DstOff, dl, DAG), 4085 /// \param Dst Pointer to destination memory location. 4098 SDValue Chain, SDValue Dst, 4115 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst); 3883 getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4000 getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4097 getMemsetStores(SelectionDAG &DAG, SDLoc dl, SDValue Chain, SDValue Dst, SDValue Src, uint64_t Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo) argument 4180 getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, bool AlwaysInline, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4248 getMemmove(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo, MachinePointerInfo SrcPtrInfo) argument 4304 getMemset(SDValue Chain, SDLoc dl, SDValue Dst, SDValue Src, SDValue Size, unsigned Align, bool isVol, MachinePointerInfo DstPtrInfo) argument [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_pair_regalloc.c | 388 variable->Dst.Index, writemask); 700 if (var->Dst.File == RC_FILE_INPUT) {
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_tgsi_info.c | 190 const struct tgsi_dst_register *dst = &inst->Dst[i].Register;
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/ |
H A D | r300_tgsi_to_rc.c | 281 transform_dstreg(ttr, &dst->U.I.DstReg, &src->Dst[0]);
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/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | ExplodedGraph.h | 236 virtual void AddEdge(ExplodedNode *Src, ExplodedNode *Dst) = 0;
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/external/mesa3d/src/gallium/auxiliary/gallivm/ |
H A D | lp_bld_tgsi_info.c | 190 const struct tgsi_dst_register *dst = &inst->Dst[i].Register;
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/external/mesa3d/src/gallium/drivers/r300/ |
H A D | r300_tgsi_to_rc.c | 281 transform_dstreg(ttr, &dst->U.I.DstReg, &src->Dst[0]);
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/external/clang/lib/CodeGen/ |
H A D | MicrosoftCXXABI.cpp | 2338 llvm::Value *Dst; local 2340 Dst = FirstField; 2342 Dst = llvm::UndefValue::get(DstNull->getType()); 2344 Dst = Builder.CreateInsertValue(Dst, FirstField, Idx++); 2346 Dst = Builder.CreateInsertValue( 2347 Dst, getValueOrZeroInt(NonVirtualBaseAdjustment), Idx++); 2349 Dst = Builder.CreateInsertValue( 2350 Dst, getValueOrZeroInt(VBPtrOffset), Idx++); 2352 Dst [all...] |
/external/llvm/lib/CodeGen/ |
H A D | TailDuplication.cpp | 296 unsigned Dst = Copy->getOperand(0).getReg(); local 299 MRI->constrainRegClass(Src, MRI->getRegClass(Dst))) { 301 MRI->replaceRegWith(Dst, Src);
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H A D | MachineInstr.cpp | 618 /// Move NumOps MachineOperands from Src to Dst, with support for overlapping 620 static void moveOperands(MachineOperand *Dst, MachineOperand *Src, argument 623 return MRI->moveOperands(Dst, Src, NumOps); 627 if (Dst < Src) 629 new (Dst + i) MachineOperand(Src[i]); 632 new (Dst + i - 1) MachineOperand(Src[i - 1]);
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/external/clang/lib/StaticAnalyzer/Core/ |
H A D | BugReporter.cpp | 621 const CFGBlock *Dst = BE->getDst(); local 658 if (const Stmt *S = Dst->getLabel()) { 730 if (*(Src->succ_begin()+1) == Dst) 758 if (*(Src->succ_begin()+1) == Dst) { 778 if (*(Src->succ_begin()+1) == Dst) { 799 if (*(Src->succ_begin()) == Dst) { 827 if (*(Src->succ_begin()+1) == Dst) { 857 if (*(Src->succ_begin()+1) == Dst) 2004 const Stmt *Dst = getLocStmt(Piece->getEndLocation()); local 2009 getEnclosingStmtLocation(Dst, S [all...] |
/external/llvm/lib/Target/R600/ |
H A D | SIInstrInfo.cpp | 835 unsigned Dst = MRI.createVirtualRegister(RC); local 844 BuildMI(*MBB, MI, DL, get(TargetOpcode::REG_SEQUENCE), Dst) 853 return Dst; 988 unsigned Dst = MI->getOperand(0).getReg(); local 990 const TargetRegisterClass *DstRC = MRI.getRegClass(Dst); 1206 unsigned Dst = split64BitImm(Worklist, local 1211 MRI.replaceRegWith(Reg, Dst);
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H A D | SIISelLowering.cpp | 967 SDValue Dst = DAG.getNode(AMDGPUISD::REGISTER_LOAD, DL, MVT::i32, local 983 Dst = DAG.getNode(ISD::AND, DL, MVT::i32, Dst, DstMask); 984 Dst = DAG.getNode(ISD::OR, DL, MVT::i32, Dst, ShiftedValue); 986 Values.push_back(Dst);
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/external/llvm/include/llvm/IR/ |
H A D | IRBuilder.h | 381 CallInst *CreateMemCpy(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument 384 return CreateMemCpy(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag, 388 CallInst *CreateMemCpy(Value *Dst, Value *Src, Value *Size, unsigned Align, 397 CallInst *CreateMemMove(Value *Dst, Value *Src, uint64_t Size, unsigned Align, argument 399 return CreateMemMove(Dst, Src, getInt64(Size), Align, isVolatile, TBAATag); 402 CallInst *CreateMemMove(Value *Dst, Value *Src, Value *Size, unsigned Align,
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/external/bison/src/ |
H A D | parse-gram.c | 572 # define YYCOPY(Dst, Src, Count) \ 573 __builtin_memcpy (Dst, Src, (Count) * sizeof (*(Src))) 575 # define YYCOPY(Dst, Src, Count) \ 580 (Dst)[yyi] = (Src)[yyi]; \
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/external/llvm/lib/Target/ARM/InstPrinter/ |
H A D | ARMInstPrinter.cpp | 112 const MCOperand &Dst = MI->getOperand(0); local 122 printRegName(O, Dst.getReg()); 135 const MCOperand &Dst = MI->getOperand(0); local 144 printRegName(O, Dst.getReg());
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
H A D | tgsi_build.c | 953 full_instruction.Dst[i] = tgsi_default_full_dst_register(); 1061 const struct tgsi_full_dst_register *reg = &full_inst->Dst[i];
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/external/llvm/lib/Target/Mips/ |
H A D | MipsSEInstrInfo.cpp | 493 const MachineOperand &Dst = I->getOperand(0), &Src = I->getOperand(1); local 494 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg;
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/external/llvm/lib/Transforms/Utils/ |
H A D | InlineFunction.cpp | 327 static void HandleByValArgumentInit(Value *Dst, Value *Src, Module *M, argument 336 Value *DstCast = builder.CreateBitCast(Dst, VoidPtrTy, "tmp");
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