/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | R600ExpandSpecialInstrs.cpp | 36 virtual bool runOnMachineFunction(MachineFunction &MF); 51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) { argument 55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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H A D | R600RegisterInfo.h | 32 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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H A D | SIInstrInfo.h | 45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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H A D | SIRegisterInfo.cpp | 27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
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H A D | SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument 55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
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H A D | AMDGPUInstrInfo.cpp | 141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, argument 149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, argument 164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, argument 238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF, argument 241 MachineRegisterInfo &MRI = MF.getRegInfo();
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/external/llvm/include/llvm/CodeGen/ |
H A D | VirtRegMap.h | 44 MachineFunction *MF; member in class:llvm::VirtRegMap 73 bool runOnMachineFunction(MachineFunction &MF) override; 81 assert(MF && "getMachineFunction called before runOnMachineFunction"); 82 return *MF;
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H A D | RegisterClassInfo.h | 51 const MachineFunction *MF; member in class:llvm::RegisterClassInfo 54 // Callee saved registers of last MF. Assumed to be valid until the next 61 // Reserved registers in the current MF. 80 /// runOnFunction - Prepare to answer questions about MF. This must be called 82 void runOnMachineFunction(const MachineFunction &MF);
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/external/llvm/lib/CodeGen/ |
H A D | BranchFolding.h | 28 bool OptimizeFunction(MachineFunction &MF, 95 bool TailMergeBlocks(MachineFunction &MF); 115 bool OptimizeBranches(MachineFunction &MF); 120 bool HoistCommonCode(MachineFunction &MF);
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H A D | TailDuplication.cpp | 83 bool runOnMachineFunction(MachineFunction &MF) override; 99 MachineFunction &MF, 105 bool TailDuplicateBlocks(MachineFunction &MF); 106 bool shouldTailDuplicate(const MachineFunction &MF, 116 MachineFunction &MF, 121 MachineFunction &MF); 134 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) { argument 135 if (skipOptnoneFunction(*MF.getFunction())) 138 TII = MF.getTarget().getInstrInfo(); 139 TRI = MF 161 VerifyPHIs(MachineFunction &MF, bool CheckExtra) argument 211 TailDuplicateAndUpdate(MachineBasicBlock *MBB, bool IsSimple, MachineFunction &MF) argument 315 TailDuplicateBlocks(MachineFunction &MF) argument 426 DuplicateInstruction(MachineInstr *MI, MachineBasicBlock *TailBB, MachineBasicBlock *PredBB, MachineFunction &MF, DenseMap<unsigned, unsigned> &LocalVRMap, const DenseSet<unsigned> &UsedByPhi) argument 546 shouldTailDuplicate(const MachineFunction &MF, bool IsSimple, MachineBasicBlock &TailBB) argument 749 TailDuplicate(MachineBasicBlock *TailBB, bool IsSimple, MachineFunction &MF, SmallVectorImpl<MachineBasicBlock *> &TDBBs, SmallVectorImpl<MachineInstr *> &Copies) argument [all...] |
H A D | PHIElimination.cpp | 68 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB); 81 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, 127 bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { argument 128 MRI = &MF.getRegInfo(); 141 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 142 Changed |= SplitPHIEdges(MF, *I, MLI); 146 analyzePHINodes(MF); 149 for (MachineFunction::iterator I = MF.begin(), E = MF 182 EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) argument 236 MachineFunction &MF = *MBB.getParent(); local 534 analyzePHINodes(const MachineFunction& MF) argument 545 SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, MachineLoopInfo *MLI) argument [all...] |
H A D | LiveStackAnalysis.cpp | 51 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { argument 52 TRI = MF.getTarget().getRegisterInfo();
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H A D | TargetRegisterInfo.cpp | 130 static void getAllocatableSetForRC(const MachineFunction &MF, argument 133 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF); 138 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, argument 145 getAllocatableSetForRC(MF, SubClass, Allocatable); 150 getAllocatableSetForRC(MF, *I, Allocatable); 154 BitVector Reserved = getReservedRegs(MF); 267 const MachineFunction &MF, 269 const MachineRegisterInfo &MRI = MF.getRegInfo(); 264 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const argument
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/external/llvm/lib/Target/Mips/ |
H A D | MipsJITInfo.h | 62 void Initialize(const MachineFunction &MF, bool isPIC, argument
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXMachineFunctionInfo.h | 25 NVPTXMachineFunctionInfo(MachineFunction &MF) {} argument
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcJITInfo.h | 60 void Initialize(const MachineFunction &MF, bool isPIC) { argument
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H A D | SparcMachineFunctionInfo.h | 38 explicit SparcMachineFunctionInfo(MachineFunction &MF) argument
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | R600ExpandSpecialInstrs.cpp | 36 virtual bool runOnMachineFunction(MachineFunction &MF); 51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) { argument 55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
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H A D | R600RegisterInfo.h | 32 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
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H A D | SIInstrInfo.h | 45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
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H A D | SIRegisterInfo.cpp | 27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
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H A D | SIInstrInfo.cpp | 52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument 55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
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/external/llvm/lib/Target/X86/ |
H A D | X86VZeroUpper.cpp | 40 bool runOnMachineFunction(MachineFunction &MF) override; 249 bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) { argument 250 const X86Subtarget &ST = MF.getTarget().getSubtarget<X86Subtarget>(); 253 TII = MF.getTarget().getInstrInfo(); 254 MachineRegisterInfo &MRI = MF.getRegInfo(); 275 BlockStates.resize(MF.getNumBlockIDs()); 280 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) 286 addDirtySuccessor(MF.front());
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64BranchRelaxation.cpp | 79 MachineFunction *MF; member in class:__anon25932::AArch64BranchRelaxation 97 bool runOnMachineFunction(MachineFunction &MF) override; 109 unsigned PrevNum = MF->begin()->getNumber(); 110 for (MachineBasicBlock &MBB : *MF) { 122 for (auto &MBB : *MF) { 150 BlockInfo.resize(MF->getNumBlockIDs()); 156 for (MachineBasicBlock &MBB : *MF) 160 adjustBlockOffsets(*MF->begin()); 193 for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) { 217 MF [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPURegisterInfo.cpp | 33 AMDGPURegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { 44 unsigned AMDGPURegisterInfo::getFrameRegister(const MachineFunction &MF) const {
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