Searched refs:MF (Results 151 - 175 of 501) sorted by relevance

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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DR600ExpandSpecialInstrs.cpp36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) { argument
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
H A DR600RegisterInfo.h32 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
H A DSIInstrInfo.h45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
H A DSIRegisterInfo.cpp27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
H A DSIInstrInfo.cpp52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument
55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
H A DAMDGPUInstrInfo.cpp141 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, argument
149 AMDGPUInstrInfo::foldMemoryOperandImpl(MachineFunction &MF, argument
164 AMDGPUInstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, argument
238 void AMDGPUInstrInfo::convertToISA(MachineInstr & MI, MachineFunction &MF, argument
241 MachineRegisterInfo &MRI = MF.getRegInfo();
/external/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h44 MachineFunction *MF; member in class:llvm::VirtRegMap
73 bool runOnMachineFunction(MachineFunction &MF) override;
81 assert(MF && "getMachineFunction called before runOnMachineFunction");
82 return *MF;
H A DRegisterClassInfo.h51 const MachineFunction *MF; member in class:llvm::RegisterClassInfo
54 // Callee saved registers of last MF. Assumed to be valid until the next
61 // Reserved registers in the current MF.
80 /// runOnFunction - Prepare to answer questions about MF. This must be called
82 void runOnMachineFunction(const MachineFunction &MF);
/external/llvm/lib/CodeGen/
H A DBranchFolding.h28 bool OptimizeFunction(MachineFunction &MF,
95 bool TailMergeBlocks(MachineFunction &MF);
115 bool OptimizeBranches(MachineFunction &MF);
120 bool HoistCommonCode(MachineFunction &MF);
H A DTailDuplication.cpp83 bool runOnMachineFunction(MachineFunction &MF) override;
99 MachineFunction &MF,
105 bool TailDuplicateBlocks(MachineFunction &MF);
106 bool shouldTailDuplicate(const MachineFunction &MF,
116 MachineFunction &MF,
121 MachineFunction &MF);
134 bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) { argument
135 if (skipOptnoneFunction(*MF.getFunction()))
138 TII = MF.getTarget().getInstrInfo();
139 TRI = MF
161 VerifyPHIs(MachineFunction &MF, bool CheckExtra) argument
211 TailDuplicateAndUpdate(MachineBasicBlock *MBB, bool IsSimple, MachineFunction &MF) argument
315 TailDuplicateBlocks(MachineFunction &MF) argument
426 DuplicateInstruction(MachineInstr *MI, MachineBasicBlock *TailBB, MachineBasicBlock *PredBB, MachineFunction &MF, DenseMap<unsigned, unsigned> &LocalVRMap, const DenseSet<unsigned> &UsedByPhi) argument
546 shouldTailDuplicate(const MachineFunction &MF, bool IsSimple, MachineBasicBlock &TailBB) argument
749 TailDuplicate(MachineBasicBlock *TailBB, bool IsSimple, MachineFunction &MF, SmallVectorImpl<MachineBasicBlock *> &TDBBs, SmallVectorImpl<MachineInstr *> &Copies) argument
[all...]
H A DPHIElimination.cpp68 bool EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB);
81 bool SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB,
127 bool PHIElimination::runOnMachineFunction(MachineFunction &MF) { argument
128 MRI = &MF.getRegInfo();
141 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
142 Changed |= SplitPHIEdges(MF, *I, MLI);
146 analyzePHINodes(MF);
149 for (MachineFunction::iterator I = MF.begin(), E = MF
182 EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) argument
236 MachineFunction &MF = *MBB.getParent(); local
534 analyzePHINodes(const MachineFunction& MF) argument
545 SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, MachineLoopInfo *MLI) argument
[all...]
H A DLiveStackAnalysis.cpp51 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { argument
52 TRI = MF.getTarget().getRegisterInfo();
H A DTargetRegisterInfo.cpp130 static void getAllocatableSetForRC(const MachineFunction &MF, argument
133 ArrayRef<MCPhysReg> Order = RC->getRawAllocationOrder(MF);
138 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, argument
145 getAllocatableSetForRC(MF, SubClass, Allocatable);
150 getAllocatableSetForRC(MF, *I, Allocatable);
154 BitVector Reserved = getReservedRegs(MF);
267 const MachineFunction &MF,
269 const MachineRegisterInfo &MRI = MF.getRegInfo();
264 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const argument
/external/llvm/lib/Target/Mips/
H A DMipsJITInfo.h62 void Initialize(const MachineFunction &MF, bool isPIC, argument
/external/llvm/lib/Target/NVPTX/
H A DNVPTXMachineFunctionInfo.h25 NVPTXMachineFunctionInfo(MachineFunction &MF) {} argument
/external/llvm/lib/Target/Sparc/
H A DSparcJITInfo.h60 void Initialize(const MachineFunction &MF, bool isPIC) { argument
H A DSparcMachineFunctionInfo.h38 explicit SparcMachineFunctionInfo(MachineFunction &MF) argument
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600ExpandSpecialInstrs.cpp36 virtual bool runOnMachineFunction(MachineFunction &MF);
51 bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) { argument
55 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end();
H A DR600RegisterInfo.h32 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
H A DSIInstrInfo.h45 virtual MachineInstr * getMovImmInstr(MachineFunction *MF, unsigned DstReg,
H A DSIRegisterInfo.cpp27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
H A DSIInstrInfo.cpp52 MachineInstr * SIInstrInfo::getMovImmInstr(MachineFunction *MF, unsigned DstReg, argument
55 MachineInstr * MI = MF->CreateMachineInstr(get(AMDGPU::V_MOV_IMM_I32), DebugLoc());
/external/llvm/lib/Target/X86/
H A DX86VZeroUpper.cpp40 bool runOnMachineFunction(MachineFunction &MF) override;
249 bool VZeroUpperInserter::runOnMachineFunction(MachineFunction &MF) { argument
250 const X86Subtarget &ST = MF.getTarget().getSubtarget<X86Subtarget>();
253 TII = MF.getTarget().getInstrInfo();
254 MachineRegisterInfo &MRI = MF.getRegInfo();
275 BlockStates.resize(MF.getNumBlockIDs());
280 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
286 addDirtySuccessor(MF.front());
/external/llvm/lib/Target/AArch64/
H A DAArch64BranchRelaxation.cpp79 MachineFunction *MF; member in class:__anon25932::AArch64BranchRelaxation
97 bool runOnMachineFunction(MachineFunction &MF) override;
109 unsigned PrevNum = MF->begin()->getNumber();
110 for (MachineBasicBlock &MBB : *MF) {
122 for (auto &MBB : *MF) {
150 BlockInfo.resize(MF->getNumBlockIDs());
156 for (MachineBasicBlock &MBB : *MF)
160 adjustBlockOffsets(*MF->begin());
193 for (auto &MBB : make_range(MachineFunction::iterator(Start), MF->end())) {
217 MF
[all...]
/external/llvm/lib/Target/R600/
H A DAMDGPURegisterInfo.cpp33 AMDGPURegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {
44 unsigned AMDGPURegisterInfo::getFrameRegister(const MachineFunction &MF) const {

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