Searched refs:reg (Results 151 - 175 of 1419) sorted by relevance

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/external/chromium_org/third_party/mesa/src/src/mesa/program/
H A Dregister_allocate.h44 unsigned int base_reg, unsigned int reg);
45 void ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int reg);
70 void ra_set_node_reg(struct ra_graph * g, unsigned int n, unsigned int reg);
/external/dexmaker/src/dx/java/com/android/dx/ssa/
H A DSsaInsn.java108 * Returns whether or not the specified reg is the result reg.
110 * @param reg register to test
114 public boolean isResultReg(int reg) { argument
115 return result != null && result.getReg() == reg;
123 * @param reg new result register
125 public void changeResultReg(int reg) { argument
127 result = result.withReg(reg);
208 * @param reg the register in question
209 * @return true if the reg i
211 isRegASource(int reg) argument
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/external/mesa3d/src/mesa/program/
H A Dregister_allocate.h44 unsigned int base_reg, unsigned int reg);
45 void ra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int reg);
70 void ra_set_node_reg(struct ra_graph * g, unsigned int n, unsigned int reg);
/external/libcxxabi/src/Unwind/
H A DDwarfParser.hpp378 uint64_t reg;
419 reg = addressSpace.getULEB128(p, instructionsEnd);
422 if (reg > kMaxRegisterNumber) {
424 "malformed DW_CFA_offset_extended dwarf unwind, reg too big\n");
427 results->savedRegisters[reg].location = kRegisterInCFA;
428 results->savedRegisters[reg].value = offset;
430 fprintf(stderr, "DW_CFA_offset_extended(reg=%lld, offset=%lld)\n", reg,
434 reg = addressSpace.getULEB128(p, instructionsEnd);
436 if (reg > kMaxRegisterNumbe
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
H A Dbrw_fs_reg_allocate.cpp34 assign_reg(int *reg_hw_locations, fs_reg *reg, int reg_width) argument
36 if (reg->file == GRF) {
37 assert(reg->reg_offset >= 0);
38 reg->reg = reg_hw_locations[reg->reg] + reg->reg_offset * reg_width;
39 reg->reg_offset = 0;
101 int reg local
236 int reg = choose_spill_reg(g); local
259 int reg = ra_get_node_reg(g, i); local
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H A Dbrw_wm_pass2.c49 GLuint reg)
55 c->pass2_grf[reg].value = value;
56 c->pass2_grf[reg].nextuse = 0;
58 value->resident = &c->pass2_grf[reg];
59 value->hw_reg = brw_vec8_grf(reg*2, 0);
175 * value is calculated, so we can just take this reg without any
188 * TODO: implement spill-to-reg so that we can rearrange discontigous
198 GLuint reg = 0; local
213 reg = i;
222 if (grf[reg
47 prealloc_reg(struct brw_wm_compile *c, struct brw_wm_value *value, GLuint reg) argument
234 GLuint reg = search_contiguous_regs(c, nr, thisinsn); local
278 GLuint reg = search_contiguous_regs(c, 1, thisinsn); local
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H A Dbrw_clip_unfilled.c53 struct brw_reg e = c->reg.tmp0;
54 struct brw_reg f = c->reg.tmp1;
57 struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
58 struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
59 struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
94 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
114 get_element(c->reg.dir, 2),
151 get_element(c->reg.dir, 2),
162 byte_offset(c->reg
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/external/chromium_org/v8/src/
H A Dregexp-macro-assembler-tracer.h19 virtual void AdvanceRegister(int reg, int by); // r[reg] += by.
54 virtual void IfRegisterGE(int reg, int comparand, Label* if_ge);
55 virtual void IfRegisterLT(int reg, int comparand, Label* if_lt);
56 virtual void IfRegisterEqPos(int reg, Label* if_eq);
68 virtual void ReadCurrentPositionFromRegister(int reg);
69 virtual void ReadStackPointerFromRegister(int reg);
73 virtual void WriteCurrentPositionToRegister(int reg, int cp_offset);
75 virtual void WriteStackPointerToRegister(int reg);
/external/mesa3d/src/mesa/drivers/dri/i965/
H A Dbrw_fs_reg_allocate.cpp34 assign_reg(int *reg_hw_locations, fs_reg *reg, int reg_width) argument
36 if (reg->file == GRF) {
37 assert(reg->reg_offset >= 0);
38 reg->reg = reg_hw_locations[reg->reg] + reg->reg_offset * reg_width;
39 reg->reg_offset = 0;
101 int reg local
236 int reg = choose_spill_reg(g); local
259 int reg = ra_get_node_reg(g, i); local
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H A Dbrw_wm_pass2.c49 GLuint reg)
55 c->pass2_grf[reg].value = value;
56 c->pass2_grf[reg].nextuse = 0;
58 value->resident = &c->pass2_grf[reg];
59 value->hw_reg = brw_vec8_grf(reg*2, 0);
175 * value is calculated, so we can just take this reg without any
188 * TODO: implement spill-to-reg so that we can rearrange discontigous
198 GLuint reg = 0; local
213 reg = i;
222 if (grf[reg
47 prealloc_reg(struct brw_wm_compile *c, struct brw_wm_value *value, GLuint reg) argument
234 GLuint reg = search_contiguous_regs(c, nr, thisinsn); local
278 GLuint reg = search_contiguous_regs(c, 1, thisinsn); local
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H A Dbrw_clip_unfilled.c53 struct brw_reg e = c->reg.tmp0;
54 struct brw_reg f = c->reg.tmp1;
57 struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
58 struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
59 struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
94 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
114 get_element(c->reg.dir, 2),
151 get_element(c->reg.dir, 2),
162 byte_offset(c->reg
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/external/openfst/src/script/
H A Dweight-class.cc32 WeightClassRegister *reg = WeightClassRegister::GetRegister(); local
34 StrToWeightImplBaseT stw = reg->GetEntry(weight_type);
/external/libunwind/src/ia64/
H A DGparser.c50 print_error ("libunwind: cannot stack reg state!\n");
155 set_reg (struct ia64_reg_info *reg, enum ia64_where where, int when, argument
158 reg->val = val;
159 reg->where = where;
160 if (reg->when == IA64_WHEN_NEVER)
161 reg->when = when;
168 struct ia64_reg_info *reg; local
170 for (reg = hi; reg >= lo; --reg)
185 struct ia64_reg_info *reg; local
202 struct ia64_reg_info *reg; local
444 desc_reg_gr(unsigned char reg, unsigned char dst, struct ia64_state_record *sr) argument
452 desc_reg_psprel(unsigned char reg, unw_word pspoff, struct ia64_state_record *sr) argument
460 desc_reg_sprel(unsigned char reg, unw_word spoff, struct ia64_state_record *sr) argument
476 struct ia64_reg_info *reg = sr->curr.reg + regnum; local
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/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/
H A Dtgsi_build.c1061 const struct tgsi_full_dst_register *reg = &full_inst->Dst[i]; local
1070 reg->Register.File,
1071 reg->Register.WriteMask,
1072 reg->Register.Indirect,
1073 reg->Register.Dimension,
1074 reg->Register.Index,
1078 if( reg->Register.Indirect ) {
1087 reg->Indirect.File,
1088 reg->Indirect.SwizzleX,
1089 reg
1143 const struct tgsi_full_src_register *reg = &full_inst->Src[i]; local
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H A Dtgsi_ureg.h850 ureg_negate( struct ureg_src reg )
852 assert(reg.File != TGSI_FILE_NULL);
853 reg.Negate ^= 1;
854 return reg;
858 ureg_abs( struct ureg_src reg )
860 assert(reg.File != TGSI_FILE_NULL);
861 reg.Absolute = 1;
862 reg.Negate = 0;
863 return reg;
867 ureg_swizzle( struct ureg_src reg, argument
889 ureg_scalar( struct ureg_src reg, int x ) argument
895 ureg_writemask( struct ureg_dst reg, unsigned writemask ) argument
912 ureg_predicate(struct ureg_dst reg, boolean negate, unsigned swizzle_x, unsigned swizzle_y, unsigned swizzle_z, unsigned swizzle_w) argument
930 ureg_dst_indirect( struct ureg_dst reg, struct ureg_src addr ) argument
941 ureg_src_indirect( struct ureg_src reg, struct ureg_src addr ) argument
953 ureg_src_dimension( struct ureg_src reg, int index ) argument
964 ureg_src_dimension_indirect( struct ureg_src reg, struct ureg_src addr, int index ) argument
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/external/mesa3d/src/gallium/auxiliary/tgsi/
H A Dtgsi_build.c1061 const struct tgsi_full_dst_register *reg = &full_inst->Dst[i]; local
1070 reg->Register.File,
1071 reg->Register.WriteMask,
1072 reg->Register.Indirect,
1073 reg->Register.Dimension,
1074 reg->Register.Index,
1078 if( reg->Register.Indirect ) {
1087 reg->Indirect.File,
1088 reg->Indirect.SwizzleX,
1089 reg
1143 const struct tgsi_full_src_register *reg = &full_inst->Src[i]; local
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H A Dtgsi_ureg.h850 ureg_negate( struct ureg_src reg )
852 assert(reg.File != TGSI_FILE_NULL);
853 reg.Negate ^= 1;
854 return reg;
858 ureg_abs( struct ureg_src reg )
860 assert(reg.File != TGSI_FILE_NULL);
861 reg.Absolute = 1;
862 reg.Negate = 0;
863 return reg;
867 ureg_swizzle( struct ureg_src reg, argument
889 ureg_scalar( struct ureg_src reg, int x ) argument
895 ureg_writemask( struct ureg_dst reg, unsigned writemask ) argument
912 ureg_predicate(struct ureg_dst reg, boolean negate, unsigned swizzle_x, unsigned swizzle_y, unsigned swizzle_z, unsigned swizzle_w) argument
930 ureg_dst_indirect( struct ureg_dst reg, struct ureg_src addr ) argument
941 ureg_src_indirect( struct ureg_src reg, struct ureg_src addr ) argument
953 ureg_src_dimension( struct ureg_src reg, int index ) argument
964 ureg_src_dimension_indirect( struct ureg_src reg, struct ureg_src addr, int index ) argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_build_util.cpp57 unsigned int pos = u32Hash(imm->reg.data.u32);
185 Instruction *insn = new_Instruction(func, OP_MOV, typeOfSize(src->reg.size));
188 insn->getDef(0)->reg.data.id = id;
198 Instruction *insn = new_Instruction(func, OP_MOV, typeOfSize(dst->reg.size));
202 insn->getSrc(0)->reg.data.id = id;
228 insn->setType((dst->reg.file == FILE_PREDICATE ||
229 dst->reg.file == FILE_FLAGS) ? TYPE_U8 : ty, ty);
237 if (dst->reg.file == FILE_FLAGS)
278 return mkOp2(OP_UNION, typeOfSize(dst->reg.size), dst, def0, def1);
288 if (val->reg
339 LValue *reg = new_LValue(func, f); local
345 LValue *reg = new_LValue(func, f); local
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H A Dnv50_ir_print.cpp325 int idx = join->reg.data.id >= 0 ? join->reg.data.id : id;
326 char p = join->reg.data.id >= 0 ? '$' : '%';
330 switch (reg.file) {
333 if (reg.size == 2) {
341 if (reg.size == 8) {
344 if (reg.size == 16) {
347 if (reg.size == 12) {
353 if (reg.size == 2)
356 if (reg
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/external/libunwind/src/sh/
H A DGresume.c126 int reg; local
130 for (reg = 0; reg <= UNW_REG_LAST; ++reg)
132 Debug (16, "copying %s %d\n", unw_regname (reg), reg);
133 if (unw_is_fpreg (reg))
135 if (tdep_access_fpreg (c, reg, &fpval, 0) >= 0)
136 as->acc.access_fpreg (as, reg, &fpval, 1, arg);
140 if (tdep_access_reg (c, reg,
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/external/mesa3d/src/gallium/drivers/nv50/codegen/
H A Dnv50_ir_build_util.cpp57 unsigned int pos = u32Hash(imm->reg.data.u32);
185 Instruction *insn = new_Instruction(func, OP_MOV, typeOfSize(src->reg.size));
188 insn->getDef(0)->reg.data.id = id;
198 Instruction *insn = new_Instruction(func, OP_MOV, typeOfSize(dst->reg.size));
202 insn->getSrc(0)->reg.data.id = id;
228 insn->setType((dst->reg.file == FILE_PREDICATE ||
229 dst->reg.file == FILE_FLAGS) ? TYPE_U8 : ty, ty);
237 if (dst->reg.file == FILE_FLAGS)
278 return mkOp2(OP_UNION, typeOfSize(dst->reg.size), dst, def0, def1);
288 if (val->reg
339 LValue *reg = new_LValue(func, f); local
345 LValue *reg = new_LValue(func, f); local
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H A Dnv50_ir_print.cpp325 int idx = join->reg.data.id >= 0 ? join->reg.data.id : id;
326 char p = join->reg.data.id >= 0 ? '$' : '%';
330 switch (reg.file) {
333 if (reg.size == 2) {
341 if (reg.size == 8) {
344 if (reg.size == 16) {
347 if (reg.size == 12) {
353 if (reg.size == 2)
356 if (reg
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/external/valgrind/main/none/tests/x86/
H A Dbt_everything.c148 UInt reg; local
185 reg = 0;
192 case 0: c = btsl_reg(reg, bitoff, &reg); break;
193 case 1: c = btrl_reg(reg, bitoff, &reg); break;
194 case 2: c = btcl_reg(reg, bitoff, &reg); break;
195 case 3: c = btl_reg(reg, bitoff, &reg); brea
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/
H A Dradeonsi_pm4.c56 void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val) argument
60 if (reg >= SI_CONFIG_REG_OFFSET && reg <= SI_CONFIG_REG_END) {
62 reg -= SI_CONFIG_REG_OFFSET;
64 } else if (reg >= SI_SH_REG_OFFSET && reg <= SI_SH_REG_END) {
66 reg -= SI_SH_REG_OFFSET;
68 } else if (reg >= SI_CONTEXT_REG_OFFSET && reg <= SI_CONTEXT_REG_END) {
70 reg
109 si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg) argument
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/external/mesa3d/src/gallium/drivers/radeonsi/
H A Dradeonsi_pm4.c56 void si_pm4_set_reg(struct si_pm4_state *state, unsigned reg, uint32_t val) argument
60 if (reg >= SI_CONFIG_REG_OFFSET && reg <= SI_CONFIG_REG_END) {
62 reg -= SI_CONFIG_REG_OFFSET;
64 } else if (reg >= SI_SH_REG_OFFSET && reg <= SI_SH_REG_END) {
66 reg -= SI_SH_REG_OFFSET;
68 } else if (reg >= SI_CONTEXT_REG_OFFSET && reg <= SI_CONTEXT_REG_END) {
70 reg
109 si_pm4_sh_data_end(struct si_pm4_state *state, unsigned reg) argument
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