/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonInstrInfo.cpp | 122 HexagonInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, argument 149 MachineInstr *Term = MBB.getFirstTerminator(); 150 if (isPredicated(Term) && !AnalyzeBranch(MBB, NewTBB, NewFBB, Cond, 153 std::next(MachineFunction::iterator(&MBB)); 156 RemoveBranch(MBB); 157 return InsertBranch(MBB, TBB, nullptr, Cond, DL); 160 BuildMI(&MBB, DL, get(BOpc)).addMBB(TBB); 162 BuildMI(&MBB, DL, 168 BuildMI(&MBB, DL, get(BccOpc)).addReg(Cond[regPos].getReg()).addMBB(TBB); 169 BuildMI(&MBB, D 175 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 416 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 473 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 520 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 956 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument 1077 isProfitableToDupForIfCvt(MachineBasicBlock &MBB,unsigned NumInstrs, const BranchProbability &Probability) const argument 1646 isSchedulingBoundary(const MachineInstr *MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const argument [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsConstantIslandPass.cpp | 393 void computeBlockSize(MachineBasicBlock *MBB); 603 static bool BBHasFallthrough(MachineBasicBlock *MBB) { argument 605 MachineFunction::iterator MBBI = MBB; 607 if (std::next(MBBI) == MBB->getParent()->end()) 611 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(), 612 E = MBB->succ_end(); I != E; ++I) 672 MachineBasicBlock &MBB = *MBBI; local 674 // If this block doesn't fall through into the next MBB, then this is 676 if (!BBHasFallthrough(&MBB)) 677 WaterList.push_back(&MBB); 816 computeBlockSize(MachineBasicBlock *MBB) argument 830 MachineBasicBlock *MBB = MI->getParent(); local 1034 BBIsJumpedOver(MachineBasicBlock *MBB) argument 1547 MachineBasicBlock *MBB = MI->getParent(); local 1612 MachineBasicBlock *MBB = MI->getParent(); local [all...] |
H A D | MipsISelLowering.cpp | 826 MachineBasicBlock &MBB, 830 return &MBB; 836 MIB = BuildMI(MBB, std::next(I), MI->getDebugLoc(), TII.get(Mips::TEQ)) 850 return &MBB; 825 insertDivByZeroTrap(MachineInstr *MI, MachineBasicBlock &MBB, const TargetInstrInfo &TII, bool Is64Bit) argument
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCInstrInfo.cpp | 317 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, argument 331 BuildMI(MBB, MI, DL, get(Opcode)); 337 bool PPCInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument 344 MachineBasicBlock::iterator I = MBB.end(); 345 if (I == MBB.begin()) 349 if (I == MBB.begin()) 360 if (I == MBB.begin() || !isUnpredicatedTerminator(--I)) { 422 if (SecondLastInst && I != MBB.begin() && 504 unsigned PPCInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 505 MachineBasicBlock::iterator I = MBB 538 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 584 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument 624 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc dl, unsigned DestReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument 689 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 850 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 945 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 1060 MBBDefinesCTR(MachineBasicBlock &MBB) argument 1138 MachineBasicBlock *MBB = MI->getOperand(0).getMBB(); local 1146 MachineBasicBlock *MBB = MI->getOperand(0).getMBB(); local 1154 MachineBasicBlock *MBB = MI->getOperand(0).getMBB(); local 1616 processBlock(MachineBasicBlock &MBB) argument 1913 processBlock(MachineBasicBlock &MBB) argument 2030 processBlock(MachineBasicBlock &MBB) argument [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDILCFGStructurizer.cpp | 210 int getSCCNum(MachineBasicBlock *MBB) const; 212 bool hasBackEdge(MachineBasicBlock *MBB) const; 214 bool isRetiredBlock(MachineBasicBlock *MBB) const; 215 bool isActiveLoophead(MachineBasicBlock *MBB) const; 220 bool needMigrateBlock(MachineBasicBlock *MBB) const; 228 void insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode, 230 MachineInstr *insertInstrBefore(MachineBasicBlock *MBB, int NewOpcode, 235 void insertCondBranchBefore(MachineBasicBlock *MBB, 238 void insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum); 244 static void setTrueBranch(MachineInstr *MI, MachineBasicBlock *MBB); 468 insertInstrEnd(MachineBasicBlock *MBB, int NewOpcode, DebugLoc DL) argument 477 insertInstrBefore(MachineBasicBlock *MBB, int NewOpcode, DebugLoc DL) argument 492 MachineBasicBlock *MBB = OldMI->getParent(); local 504 MachineBasicBlock *MBB = OldMI->getParent(); local 525 insertCondBranchEnd(MachineBasicBlock *MBB, int NewOpcode, int RegNum) argument 579 setTrueBranch(MachineInstr *MI, MachineBasicBlock *MBB) argument 585 getFalseBranch(MachineBasicBlock *MBB, MachineInstr *MI) argument 617 getLastDebugLocInBB(MachineBasicBlock *MBB) argument 629 getNormalBlockBranchInstr( MachineBasicBlock *MBB) argument 638 getLoopendBlockBranchInstr( MachineBasicBlock *MBB) argument 654 getReturnInstr(MachineBasicBlock *MBB) argument 664 getContinueInstr(MachineBasicBlock *MBB) argument 674 isReturnBlock(MachineBasicBlock *MBB) argument 693 clone(MachineBasicBlock *MBB) argument 714 wrapup(MachineBasicBlock *MBB) argument 773 MachineBasicBlock *MBB = *It; local 803 MachineBasicBlock *MBB; local 933 MachineBasicBlock *MBB; local 950 MachineBasicBlock *MBB = &(*It); local 957 patternMatch(MachineBasicBlock *MBB) argument 976 patternMatchGroup(MachineBasicBlock *MBB) argument 985 serialPatternMatch(MachineBasicBlock *MBB) argument 998 ifPatternMatch(MachineBasicBlock *MBB) argument 1155 MachineBasicBlock *MBB = *It; local 1454 MachineBasicBlock *MBB = *PI; local 1497 mergeIfthenelseBlock(MachineInstr *BranchMI, MachineBasicBlock *MBB, MachineBasicBlock *TrueMBB, MachineBasicBlock *FalseMBB, MachineBasicBlock *LandMBB) argument 1659 cloneBlockForPredecessor(MachineBasicBlock *MBB, MachineBasicBlock *PredMBB) argument 1748 removeUnconditionalBranch(MachineBasicBlock *MBB) argument 1760 removeRedundantConditionalBranch( MachineBasicBlock *MBB) argument 1785 MachineBasicBlock *MBB = *It; local 1798 removeSuccessor(MachineBasicBlock *MBB) argument 1803 recordSccnum(MachineBasicBlock *MBB, int SccNum) argument 1811 retireBlock(MachineBasicBlock *MBB) argument 1826 setLoopLandBlock(MachineLoop *loopRep, MachineBasicBlock *MBB) argument 1880 MachineBasicBlock *MBB = *It; local [all...] |
H A D | SIInstrInfo.cpp | 36 SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, argument 75 for (MachineBasicBlock::reverse_iterator E = MBB.rend(), 95 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DestReg) 101 BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B64), DestReg) 123 BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DestReg) 161 MachineInstrBuilder Builder = BuildMI(MBB, MI, DL, 185 void SIInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, argument 191 MachineFunction *MF = MBB.getParent(); 194 DebugLoc DL = MBB.findDebugLoc(MI); 200 BuildMI(MBB, M 239 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 313 MachineBasicBlock &MBB = *MI->getParent(); local 410 buildMovInstr(MachineBasicBlock *MBB, MachineBasicBlock::iterator I, unsigned DstReg, unsigned SrcReg) const argument 831 MachineBasicBlock *MBB = MI->getParent(); local 993 MachineBasicBlock &MBB = *MI->getParent(); local 1023 MachineBasicBlock &MBB = *MI->getParent(); local 1108 MachineBasicBlock *MBB = MI->getParent(); local 1179 MachineBasicBlock *MBB = Inst->getParent(); local 1370 MachineBasicBlock &MBB = *Inst->getParent(); local 1422 MachineBasicBlock &MBB = *Inst->getParent(); local 1484 MachineBasicBlock &MBB = *Inst->getParent(); local 1540 buildIndirectWrite( MachineBasicBlock *MBB, MachineBasicBlock::iterator I, unsigned ValueReg, unsigned Address, unsigned OffsetReg) const argument 1558 buildIndirectRead( MachineBasicBlock *MBB, MachineBasicBlock::iterator I, unsigned ValueReg, unsigned Address, unsigned OffsetReg) const argument [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | AsmPrinter.cpp | 746 for (auto &MBB : *MF) { 748 EmitBasicBlockStart(MBB); 749 for (auto &MI : MBB) { 1186 const MachineBasicBlock *MBB = JTBBs[ii]; local 1187 if (!EmittedSets.insert(MBB)) continue; 1191 MCSymbolRefExpr::Create(MBB->getSymbol(), OutContext); 1192 OutStreamer.EmitAssignment(GetJTSetSymbol(JTI, MBB->getNumber()), 1215 /// EmitJumpTableEntry - Emit a jump table entry for the specified MBB to the 1218 const MachineBasicBlock *MBB, 1220 assert(MBB 1217 EmitJumpTableEntry(const MachineJumpTableInfo *MJTI, const MachineBasicBlock *MBB, unsigned UID) const argument 2146 emitBasicBlockLoopComments(const MachineBasicBlock &MBB, const MachineLoopInfo *LI, const AsmPrinter &AP) argument [all...] |
/external/llvm/lib/CodeGen/ |
H A D | MachineScheduler.cpp | 55 cl::desc("Only schedule this MBB#")); 372 MachineBasicBlock *MBB, 376 return MI->isCall() || TII->isSchedulingBoundary(MI, MBB, *MF); 388 for (MachineFunction::iterator MBB = MF->begin(), MBBEnd = MF->end(); 389 MBB != MBBEnd; ++MBB) { 391 Scheduler.startBlock(MBB); 397 && (int)SchedOnlyBlock != MBB->getNumber()) 406 // MBB->end() for the bottom region. 412 // MBB 371 isSchedBoundary(MachineBasicBlock::iterator MI, MachineBasicBlock *MBB, MachineFunction *MF, const TargetInstrInfo *TII, bool IsPostRA) argument [all...] |
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 2961 MachineBasicBlock *MBB, 2965 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); 2994 BuildMI(*MBB, MI, DL, TII.get(is64Bit ? SP::LDXri : SP::LDri), Val0Reg) 2997 // Split the basic block MBB before MI and insert the loop block in the hole. 2998 MachineFunction::iterator MFI = MBB; 2999 const BasicBlock *LLVM_BB = MBB->getBasicBlock(); 3000 MachineFunction *MF = MBB->getParent(); 3008 DoneMBB->splice(DoneMBB->begin(), MBB, MI, MBB->end()); 3009 DoneMBB->transferSuccessorsAndUpdatePHIs(MBB); 2960 expandAtomicRMW(MachineInstr *MI, MachineBasicBlock *MBB, unsigned Opcode, unsigned CondCode) const argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 1729 bool X86InstrInfo::isSafeToClobberEFLAGS(MachineBasicBlock &MBB, argument 1731 MachineBasicBlock::iterator E = MBB.end(); 1764 for (MachineBasicBlock::succ_iterator SI = MBB.succ_begin(), 1765 SE = MBB.succ_end(); SI != SE; ++SI) 1771 MachineBasicBlock::iterator B = MBB.begin(); 1777 return !MBB.isLiveIn(X86::EFLAGS); 1807 void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB, argument 1815 if (Opc == X86::MOV32r0 && !isSafeToClobberEFLAGS(MBB, I)) { 1817 BuildMI(MBB, I, DL, get(X86::MOV32ri)).addOperand(Orig->getOperand(0)) 1820 MachineInstr *MI = MBB 2757 AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const argument 2922 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 2971 canInsertSelect(const MachineBasicBlock &MBB, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, int &FalseCycles) const argument 3007 insertSelect(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DstReg, const SmallVectorImpl<MachineOperand> &Cond, unsigned TrueReg, unsigned FalseReg) const argument 3101 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 3281 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 3320 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIdx, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 3818 MachineBasicBlock *MBB = CmpInstr->getParent(); local [all...] |
H A D | X86ISelLowering.cpp | 1753 const MachineBasicBlock *MBB, 1755 assert(MBB->getParent()->getTarget().getRelocationModel() == Reloc::PIC_ && 1759 return MCSymbolRefExpr::Create(MBB->getSymbol(), 16888 static MachineBasicBlock *EmitXBegin(MachineInstr *MI, MachineBasicBlock *MBB, 16892 const BasicBlock *BB = MBB->getBasicBlock(); 16893 MachineFunction::iterator I = MBB; 16907 MachineBasicBlock *thisMBB = MBB; 16908 MachineFunction *MF = MBB->getParent(); 16915 sinkMBB->splice(sinkMBB->begin(), MBB, 16916 std::next(MachineBasicBlock::iterator(MI)), MBB 1752 LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI, const MachineBasicBlock *MBB, unsigned uid,MCContext &Ctx) const argument [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 1550 MachineBasicBlock *MBB; member in class:BasicBlockSDNode 1556 : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb) 1560 MachineBasicBlock *getBasicBlock() const { return MBB; }
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseInstrInfo.cpp | 276 ARMBaseInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,MachineBasicBlock *&TBB, argument 283 MachineBasicBlock::iterator I = MBB.end(); 284 if (I == MBB.begin()) 299 if (I == MBB.begin()) 344 while (DI != MBB.end()) { 355 if (I == MBB.begin()) 367 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const { 368 MachineBasicBlock::iterator I = MBB.end(); 369 if (I == MBB.begin()) return 0; 372 if (I == MBB 396 InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const argument 662 copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, DebugLoc DL, unsigned DestReg, unsigned SrcReg, bool KillSrc) const argument 796 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 987 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FI, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument 1290 reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SubIdx, const MachineInstr *Orig, const TargetRegisterInfo &TRI) const argument 1539 isSchedulingBoundary(const MachineInstr *MI, const MachineBasicBlock *MBB, const MachineFunction &MF) const argument 1583 isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, const BranchProbability &Probability) const argument 1840 emitARMRegPlusImmediate(MachineBasicBlock &MBB, MachineBasicBlock::iterator &MBBI, DebugLoc dl, unsigned DestReg, unsigned BaseReg, int NumBytes, ARMCC::CondCodes Pred, unsigned PredReg, const ARMBaseInstrInfo &TII, unsigned MIFlags) argument 2465 MachineBasicBlock *MBB = CmpInstr->getParent(); local [all...] |
H A D | ARMISelLowering.cpp | 6295 SetupEntryBlockForSjLj(MachineInstr *MI, MachineBasicBlock *MBB, argument 6299 MachineFunction *MF = MBB->getParent(); 6327 // Load the address of the dispatch MBB into the jump buffer. 6335 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2LDRpci), NewVReg1) 6341 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2ORRri), NewVReg2) 6345 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg3) 6348 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::t2STRi12)) 6362 AddDefaultPred(BuildMI(*MBB, MI, dl, TII->get(ARM::tLDRpci), NewVReg1) 6366 BuildMI(*MBB, MI, dl, TII->get(ARM::tPICADD), NewVReg2) 6371 AddDefaultPred(BuildMI(*MBB, M 6815 OtherSucc(MachineBasicBlock *MBB, MachineBasicBlock *Succ) argument [all...] |
/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2568 // Create a new basic block after MBB. 2569 static MachineBasicBlock *emitBlockAfter(MachineBasicBlock *MBB) { argument 2570 MachineFunction &MF = *MBB->getParent(); 2571 MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(MBB->getBasicBlock()); 2572 MF.insert(std::next(MachineFunction::iterator(MBB)), NewMBB); 2576 // Split MBB after MI and return the new block (the one that contains 2579 MachineBasicBlock *MBB) { 2580 MachineBasicBlock *NewMBB = emitBlockAfter(MBB); 2581 NewMBB->splice(NewMBB->begin(), MBB, 2582 std::next(MachineBasicBlock::iterator(MI)), MBB 2578 splitBlockAfter(MachineInstr *MI, MachineBasicBlock *MBB) argument 2588 splitBlockBefore(MachineInstr *MI, MachineBasicBlock *MBB) argument 2661 emitCondStore(MachineInstr *MI, MachineBasicBlock *MBB, unsigned StoreOpcode, unsigned STOCOpcode, bool Invert) const argument 2728 emitAtomicLoadBinary(MachineInstr *MI, MachineBasicBlock *MBB, unsigned BinOpcode, unsigned BitSize, bool Invert) const argument 2852 emitAtomicLoadMinMax(MachineInstr *MI, MachineBasicBlock *MBB, unsigned CompareOpcode, unsigned KeepOldMask, unsigned BitSize) const argument 3083 emitExt128(MachineInstr *MI, MachineBasicBlock *MBB, bool ClearEven, unsigned SubReg) const argument 3115 emitMemMemWrapper(MachineInstr *MI, MachineBasicBlock *MBB, unsigned Opcode) const argument 3285 emitStringWrapper(MachineInstr *MI, MachineBasicBlock *MBB, unsigned Opcode) const argument [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 1405 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) { argument 1408 ID.AddPointer(MBB); 1413 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
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