Searched refs:reg (Results 176 - 200 of 1419) sorted by relevance

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/external/llvm/lib/Target/Sparc/
H A DSparcFrameLowering.cpp194 for (unsigned reg = SP::I0; reg <= SP::I7; ++reg)
195 if (MRI->isPhysRegUsed(reg))
198 for (unsigned reg = SP::L0; reg <= SP::L7; ++reg)
199 if (MRI->isPhysRegUsed(reg))
222 for (unsigned reg = SP::I0; reg <
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/external/kernel-headers/original/uapi/asm-x86/asm/
H A Dmtrr.h91 #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
92 #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)
/external/oprofile/module/x86/
H A Dapic_compat.h68 static __inline void apic_write(unsigned long reg, unsigned long v) argument
70 *((volatile u32 *)(APIC_BASE+reg)) = v;
73 static __inline unsigned long apic_read(unsigned long reg) argument
75 return *((volatile u32 *)(APIC_BASE+reg));
/external/lldb/source/Plugins/Process/POSIX/
H A DRegisterContextFreeBSD_x86_64.cpp20 #define UPDATE_GPR_INFO(reg) \
22 GetRegisterContext()[gpr_##reg].byte_size = sizeof(GPR::reg); \
23 GetRegisterContext()[gpr_##reg].byte_offset = GPR_OFFSET(reg); \
26 #define UPDATE_I386_GPR_INFO(i386_reg, reg) \
28 GetRegisterContext()[gpr_##i386_reg].byte_offset = GPR_OFFSET(reg); \
H A DRegisterContext_i386.h38 GetRegisterInfoAtIndex(size_t reg);
50 GetRegisterName(unsigned reg);
53 ReadRegisterValue(uint32_t reg, lldb_private::Scalar &value);
56 ReadRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data);
66 WriteRegisterValue(uint32_t reg, const lldb_private::Scalar &value);
69 WriteRegisterBytes(uint32_t reg, lldb_private::DataExtractor &data,
/external/chromium_org/v8/test/cctest/
H A Dtest-code-stubs-ia32.cc74 Register reg = Register::FromAllocationIndex(reg_num); local
75 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
76 __ push(reg);
92 Register reg = Register::FromAllocationIndex(reg_num); local
93 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
94 __ cmp(reg, MemOperan
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H A Dtest-code-stubs-x64.cc78 Register reg = Register::FromAllocationIndex(reg_num); local
79 if (!reg.is(rsp) && !reg.is(rbp) && !reg.is(destination_reg)) {
80 __ pushq(reg);
95 Register reg = Register::FromAllocationIndex(reg_num); local
96 if (!reg.is(rsp) && !reg.is(rbp) && !reg.is(destination_reg)) {
97 __ cmpq(reg, MemOperan
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H A Dtest-code-stubs-x87.cc74 Register reg = Register::FromAllocationIndex(reg_num); local
75 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
76 __ push(reg);
92 Register reg = Register::FromAllocationIndex(reg_num); local
93 if (!reg.is(esp) && !reg.is(ebp) && !reg.is(destination_reg)) {
94 __ cmp(reg, MemOperan
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/external/dexmaker/src/dx/java/com/android/dx/ssa/
H A DPhiTypeResolver.java70 for (int reg = 0; reg < regCount; reg++) {
71 SsaInsn definsn = ssaMeth.getDefinitionForRegister(reg);
75 worklist.set(reg);
79 int reg;
80 while ( 0 <= (reg = worklist.nextSetBit(0))) {
81 worklist.clear(reg);
87 PhiInsn definsn = (PhiInsn)ssaMeth.getDefinitionForRegister(reg);
95 List<SsaInsn> useList = ssaMeth.getUseListForRegister(reg);
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/external/libnfc-nci/src/nfa/sys/
H A Dnfa_sys_main.c86 freebuf = (*nfa_sys_cb.reg[id]->evt_hdlr) (p_msg);
129 nfa_sys_cb.reg[id] = (tNFA_SYS_REG *) p_reg;
175 (*nfa_sys_cb.reg[NFA_ID_DM]->disable) ();
263 if (nfa_sys_cb.reg[id]->enable != NULL)
266 (*nfa_sys_cb.reg[id]->enable) ();
300 if (nfa_sys_cb.reg[id]->disable != NULL)
303 (*nfa_sys_cb.reg[id]->disable) ();
316 (*nfa_sys_cb.reg[NFA_ID_DM]->disable) ();
338 if ((nfa_sys_cb.is_reg[id]) && (nfa_sys_cb.reg[id]->proc_nfcc_pwr_mode))
341 (*nfa_sys_cb.reg[i
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/external/qemu/tcg/
H A Dtcg.c351 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size) argument
355 s->frame_reg = reg;
386 static inline int tcg_global_reg_new_internal(TCGType type, int reg, argument
397 if (tcg_regset_test_reg(s->reserved_regs, reg))
405 ts->reg = reg;
408 tcg_regset_set_reg(s->reserved_regs, reg);
412 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name) argument
416 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
420 TCGv_i64 tcg_global_reg_new_i64(int reg, cons argument
428 tcg_global_mem_new_internal(TCGType type, int reg, intptr_t offset, const char *name) argument
489 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name) argument
495 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name) argument
1751 int reg, k; local
1804 tcg_reg_sync(TCGContext *s, int reg) argument
1822 tcg_reg_free(TCGContext *s, int reg) argument
1837 int i, reg; local
2094 int i, k, nb_iargs, nb_oargs, reg; local
2260 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params; local
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/external/dexmaker/src/dx/java/com/android/dx/dex/file/
H A DDebugInfoDecoder.java57 /** indexed by register, the last local variable live in a reg */
154 public int reg; field in class:DebugInfoDecoder.LocalEntry
165 public LocalEntry(int address, boolean isStart, int reg, int nameIndex, argument
169 this.reg = reg;
177 address, isStart ? "start" : "end", reg,
288 int reg = Leb128Utils.readUnsignedLeb128(bs);
292 address, true, reg, nameIdx, typeIdx, 0);
295 lastEntryForReg[reg] = le;
300 int reg
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/external/dexmaker/src/dx/java/com/android/dx/rop/code/
H A DRegisterSpecSet.java32 * {@code null} or is an instance whose {@code reg}
162 * @param reg {@code >= 0;} the desired register number
166 public RegisterSpec get(int reg) { argument
168 return specs[reg];
171 throw new IllegalArgumentException("bogus reg");
200 for (int reg = 0; reg < length; reg++) {
201 RegisterSpec s = specs[reg];
225 for (int reg
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
H A Dr300_fragprog_swizzle.c107 static int r300_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg) argument
117 if (reg.Abs || reg.Negate)
121 unsigned int swz = GET_SWZ(reg.Swizzle, j);
134 if (GET_SWZ(reg.Swizzle, j) != RC_SWIZZLE_UNUSED)
137 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
140 sd = lookup_native_swizzle(reg.Swizzle);
141 if (!sd || (reg.File == RC_FILE_PRESUB && sd->srcp_stride == 0))
/external/dexmaker/src/dx/java/com/android/dx/ssa/back/
H A DRegisterAllocator.java78 * @param reg register
81 protected final int getCategoryForSsaReg(int reg) { argument
82 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
85 // an undefined reg
95 * @param reg {@code >= 0;} SSA register
99 protected final RegisterSpec getDefinitionSpecForSsaReg(int reg) { argument
100 SsaInsn definition = ssaMeth.getDefinitionForRegister(reg);
109 * @param reg register in question
112 protected boolean isDefinitionMoveParam(int reg) { argument
113 SsaInsn defInsn = ssaMeth.getDefinitionForRegister(reg);
135 insertMoveBefore(SsaInsn insn, RegisterSpec reg) argument
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/external/lldb/tools/debugserver/source/MacOSX/ppc/
H A DDNBArchImpl.cpp17 #define PREFIX_DOUBLE_UNDERSCORE_DARWIN_UNIX03(reg) __##reg
19 #define PREFIX_DOUBLE_UNDERSCORE_DARWIN_UNIX03(reg) reg
421 DNBArchMachPPC::GetRegisterValue(int set, int reg, DNBRegisterValue *value) const argument
425 switch (reg)
429 reg = e_regNumGPR_srr0;
434 reg = e_regNumGPR_r1;
446 reg = e_regNumGPR_lr;
451 reg
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/external/llvm/lib/CodeGen/
H A DLiveRegMatrix.cpp76 DEBUG(dbgs() << "assigning " << PrintReg(VirtReg.reg, TRI)
78 assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
79 VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
90 unsigned PhysReg = VRM->getPhys(VirtReg.reg);
91 DEBUG(dbgs() << "unassigning " << PrintReg(VirtReg.reg, TRI)
93 VRM->clearVirt(VirtReg.reg);
107 if (RegMaskVirtReg != VirtReg.reg || RegMaskTag != UserTag) {
108 RegMaskVirtReg = VirtReg.reg;
124 CoalescerPair CP(VirtReg.reg, PhysReg, *TRI);
/external/mesa3d/src/gallium/drivers/r300/compiler/
H A Dr300_fragprog_swizzle.c107 static int r300_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg) argument
117 if (reg.Abs || reg.Negate)
121 unsigned int swz = GET_SWZ(reg.Swizzle, j);
134 if (GET_SWZ(reg.Swizzle, j) != RC_SWIZZLE_UNUSED)
137 if ((reg.Negate & relevant) && ((reg.Negate & relevant) != relevant))
140 sd = lookup_native_swizzle(reg.Swizzle);
141 if (!sd || (reg.File == RC_FILE_PRESUB && sd->srcp_stride == 0))
/external/ltrace/sysdeps/linux-gnu/metag/
H A Dtrace.c118 get_regval_from_unit(enum metag_unitnum unit, unsigned int reg, argument
122 * Check if reg has a sane value.
127 if (reg >= ((sizeof(regs->ax)/N_UNITS/REG_SIZE)))
130 if (reg >= ((sizeof(regs->dx)/N_UNITS/REG_SIZE)))
136 return regs->ax[reg][1];
138 return regs->dx[reg][0];
140 return regs->dx[reg][1];
142 return regs->ax[reg][0];
153 reg, unit);
163 unsigned int unit = 0, reg; local
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DR600RegisterInfo.cpp69 unsigned R600RegisterInfo::getHWRegIndex(unsigned reg) const
71 switch(reg) {
84 default: return getHWRegIndexGen(reg);
88 unsigned R600RegisterInfo::getHWRegChan(unsigned reg) const
90 switch(reg) {
103 default: return getHWRegChanGen(reg);
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600RegisterInfo.cpp69 unsigned R600RegisterInfo::getHWRegIndex(unsigned reg) const
71 switch(reg) {
84 default: return getHWRegIndexGen(reg);
88 unsigned R600RegisterInfo::getHWRegChan(unsigned reg) const
90 switch(reg) {
103 default: return getHWRegChanGen(reg);
/external/llvm/lib/Target/R600/
H A DAMDGPUAsmPrinter.cpp240 unsigned reg = MO.getReg(); local
241 if (reg == AMDGPU::VCC || reg == AMDGPU::VCC_LO ||
242 reg == AMDGPU::VCC_HI) {
247 switch (reg) {
255 if (AMDGPU::SReg_32RegClass.contains(reg)) {
258 } else if (AMDGPU::VReg_32RegClass.contains(reg)) {
261 } else if (AMDGPU::SReg_64RegClass.contains(reg)) {
264 } else if (AMDGPU::VReg_64RegClass.contains(reg)) {
267 } else if (AMDGPU::VReg_96RegClass.contains(reg)) {
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/external/ltrace/sysdeps/linux-gnu/m68k/
H A Dfetch.c25 #include <sys/reg.h>
114 int reg; local
117 case 0: reg = PT_D1; break;
118 case 1: reg = PT_D2; break;
119 case 2: reg = PT_D3; break;
120 case 3: reg = PT_D4; break;
121 case 4: reg = PT_D5; break;
122 case 5: reg = PT_A0; break;
127 value_set_word(valuep, context->regs[reg]);
179 int reg local
197 unsigned long *reg = &context->fpregs.fpregs[0]; local
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.apache.ant_1.7.1.v20090120-1145/lib/
H A Dant-apache-regexp.jar ... ant.BuildException org.apache.regexp.RE reg org.apache.regexp.RESyntaxException e int options
/external/llvm/include/llvm/CodeGen/
H A DLiveVariables.h208 bool removeVirtualRegisterKilled(unsigned reg, MachineInstr *MI) { argument
209 if (!getVarInfo(reg).removeKill(MI))
215 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
244 bool removeVirtualRegisterDead(unsigned reg, MachineInstr *MI) { argument
245 if (!getVarInfo(reg).removeKill(MI))
251 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
277 void HandleVirtRegDef(unsigned reg, MachineInstr *MI);
278 void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,

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