/external/llvm/lib/Target/ARM/ |
H A D | ARMJITInfo.h | 55 void replaceMachineCodeForFunction(void *Old, void *New) override; member in class:llvm::ARMJITInfo 61 JITCodeEmitter &JCE) override; member in class:llvm::ARMJITInfo 65 StubLayout getStubLayout() override; member in class:llvm::ARMJITInfo 71 JITCodeEmitter &JCE) override; member in class:llvm::ARMJITInfo 74 LazyResolverFn getLazyResolverFunction(JITCompilerFn) override; member in class:llvm::ARMJITInfo 80 unsigned NumRelocs, unsigned char* GOTBase) override; member in class:llvm::ARMJITInfo 84 bool hasCustomConstantPool() const override { return true; } 88 bool hasCustomJumpTables() const override { return true; } 93 bool allocateSeparateGVMemory() const override {
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H A D | ARMOptimizeBarriersPass.cpp | 28 bool runOnMachineFunction(MachineFunction &Fn) override; member in class:__anon25982::ARMOptimizeBarriersPass 30 const char *getPassName() const override {
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H A D | ARMTargetMachine.h | 35 const ARMSubtarget *getSubtargetImpl() const override { return &Subtarget; } 36 const ARMBaseRegisterInfo *getRegisterInfo() const override { 39 const ARMTargetLowering *getTargetLowering() const override { 42 const ARMSelectionDAGInfo *getSelectionDAGInfo() const override { 45 const ARMBaseInstrInfo *getInstrInfo() const override { 48 const ARMFrameLowering *getFrameLowering() const override { 51 const InstrItineraryData *getInstrItineraryData() const override { 54 const DataLayout *getDataLayout() const override { 57 ARMJITInfo *getJITInfo() override { return Subtarget.getJITInfo(); } 60 void addAnalysisPasses(PassManagerBase &PM) override; member in class:llvm::ARMBaseTargetMachine 63 TargetPassConfig *createPassConfig(PassManagerBase &PM) override; member in class:llvm::ARMBaseTargetMachine 65 bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &MCE) override; member in class:llvm::ARMBaseTargetMachine 81 void anchor() override; member in class:llvm::ARMLETargetMachine 92 void anchor() override; member in class:llvm::ARMBETargetMachine 114 void anchor() override; member in class:llvm::ThumbLETargetMachine 125 void anchor() override; member in class:llvm::ThumbBETargetMachine [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMWinCOFFObjectWriter.cpp | 29 bool IsCrossSection) const override; member in class:__anon26002::ARMWinCOFFObjectWriter 31 bool recordRelocation(const MCFixup &) const override; member in class:__anon26002::ARMWinCOFFObjectWriter
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H A D | ARMWinCOFFStreamer.cpp | 22 void EmitAssemblerFlag(MCAssemblerFlag Flag) override; member in class:__anon26003::ARMWinCOFFStreamer 23 void EmitThumbFunc(MCSymbol *Symbol) override; member in class:__anon26003::ARMWinCOFFStreamer
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/external/llvm/lib/Target/CppBackend/ |
H A D | CPPTargetMachine.h | 34 AnalysisID StopAfter) override; member in struct:llvm::CPPTargetMachine 36 const DataLayout *getDataLayout() const override { return nullptr; }
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonRemoveSZExtArgs.cpp | 36 bool runOnFunction(Function &F) override; member in struct:__anon26020::HexagonRemoveExtendArgs 38 const char *getPassName() const override { 42 void getAnalysisUsage(AnalysisUsage &AU) const override {
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/external/llvm/lib/Target/Hexagon/InstPrinter/ |
H A D | HexagonInstPrinter.h | 30 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override; member in class:llvm::HexagonInstPrinter
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430InstrInfo.h | 58 bool KillSrc) const override; member in class:llvm::MSP430InstrInfo 65 const TargetRegisterInfo *TRI) const override; member in class:llvm::MSP430InstrInfo 70 const TargetRegisterInfo *TRI) const override; member in class:llvm::MSP430InstrInfo 76 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; member in class:llvm::MSP430InstrInfo 77 bool isUnpredicatedTerminator(const MachineInstr *MI) const override; member in class:llvm::MSP430InstrInfo 81 bool AllowModify) const override; member in class:llvm::MSP430InstrInfo 83 unsigned RemoveBranch(MachineBasicBlock &MBB) const override; member in class:llvm::MSP430InstrInfo 87 DebugLoc DL) const override; member in class:llvm::MSP430InstrInfo
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsAsmBackend.h | 40 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override; member in class:llvm::MipsAsmBackend 43 uint64_t Value, bool IsPCRel) const override; member in class:llvm::MipsAsmBackend 45 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; member in class:llvm::MipsAsmBackend 47 unsigned getNumFixupKinds() const override { 58 bool mayNeedRelaxation(const MCInst &Inst) const override { 66 const MCAsmLayout &Layout) const override { 78 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {} 82 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override; member in class:llvm::MipsAsmBackend 87 bool &IsResolved) override; member in class:llvm::MipsAsmBackend
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H A D | MipsMCCodeEmitter.h | 55 const MCSubtargetInfo &STI) const override; member in class:llvm::MipsMCCodeEmitter
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/external/llvm/lib/Target/Mips/ |
H A D | MipsAsmPrinter.h | 98 const char *getPassName() const override { 102 bool runOnMachineFunction(MachineFunction &MF) override; member in class:llvm::MipsAsmPrinter 104 void EmitConstantPool() override { 112 void EmitInstruction(const MachineInstr *MI) override; member in class:llvm::MipsAsmPrinter 116 void EmitFunctionEntryLabel() override; member in class:llvm::MipsAsmPrinter 117 void EmitFunctionBodyStart() override; member in class:llvm::MipsAsmPrinter 118 void EmitFunctionBodyEnd() override; member in class:llvm::MipsAsmPrinter 120 const MachineBasicBlock* MBB) const override; member in class:llvm::MipsAsmPrinter 123 raw_ostream &O) override; member in class:llvm::MipsAsmPrinter 126 raw_ostream &O) override; member in class:llvm::MipsAsmPrinter 134 void EmitStartOfAsmFile(Module &M) override; member in class:llvm::MipsAsmPrinter 135 void EmitEndOfAsmFile(Module &M) override; member in class:llvm::MipsAsmPrinter [all...] |
H A D | MipsInstrInfo.h | 12 // FIXME: We need to override TargetInstrInfo::getInlineAsmLength method in 57 bool AllowModify) const override; member in class:llvm::MipsInstrInfo 59 unsigned RemoveBranch(MachineBasicBlock &MBB) const override; member in class:llvm::MipsInstrInfo 64 DebugLoc DL) const override; member in class:llvm::MipsInstrInfo 67 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; member in class:llvm::MipsInstrInfo 77 MachineBasicBlock::iterator MI) const override; member in class:llvm::MipsInstrInfo 94 const TargetRegisterInfo *TRI) const override { 102 const TargetRegisterInfo *TRI) const override {
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXAssignValidGlobalNames.cpp | 36 bool runOnModule(Module &M) override; member in class:__anon26060::NVPTXAssignValidGlobalNames
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H A D | NVPTXISelDAGToDAG.h | 47 const char *getPassName() const override { 55 std::vector<SDValue> &OutOps) override; member in class:__anon26063::NVPTXDAGToDAGISel 60 SDNode *Select(SDNode *N) override; member in class:__anon26063::NVPTXDAGToDAGISel
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H A D | NVPTXRegisterInfo.h | 45 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; member in class:llvm::NVPTXRegisterInfo 47 BitVector getReservedRegs(const MachineFunction &MF) const override; member in class:llvm::NVPTXRegisterInfo 51 RegScavenger *RS = nullptr) const override; member in class:llvm::NVPTXRegisterInfo 53 unsigned getFrameRegister(const MachineFunction &MF) const override; member in class:llvm::NVPTXRegisterInfo
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/external/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.h | 34 void printRegName(raw_ostream &OS, unsigned RegNo) const override; member in class:llvm::PPCInstPrinter 35 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override; member in class:llvm::PPCInstPrinter
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.h | 36 void emitPrologue(MachineFunction &MF) const override; member in class:llvm::PPCFrameLowering 37 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; member in class:llvm::PPCFrameLowering 39 bool hasFP(const MachineFunction &MF) const override; member in class:llvm::PPCFrameLowering 44 RegScavenger *RS = nullptr) const override; member in class:llvm::PPCFrameLowering 46 RegScavenger *RS = nullptr) const override; member in class:llvm::PPCFrameLowering 52 const TargetRegisterInfo *TRI) const override; member in class:llvm::PPCFrameLowering 56 MachineBasicBlock::iterator I) const override; member in class:llvm::PPCFrameLowering 61 const TargetRegisterInfo *TRI) const override; member in class:llvm::PPCFrameLowering 66 bool targetHandlesStackFrameRounding() const override { return true; } 119 getCalleeSavedSpillSlots(unsigned &NumEntries) const override; member in class:llvm::PPCFrameLowering [all...] |
/external/llvm/lib/Target/R600/ |
H A D | AMDGPUInstrInfo.h | 55 unsigned &DstReg, unsigned &SubIdx) const override; member in class:llvm::AMDGPUInstrInfo 58 int &FrameIndex) const override; member in class:llvm::AMDGPUInstrInfo 60 int &FrameIndex) const override; member in class:llvm::AMDGPUInstrInfo 63 int &FrameIndex) const override; member in class:llvm::AMDGPUInstrInfo 74 LiveVariables *LV) const override; member in class:llvm::AMDGPUInstrInfo 82 bool expandPostRAPseudo(MachineBasicBlock::iterator MI) const override; member in class:llvm::AMDGPUInstrInfo 88 const TargetRegisterInfo *TRI) const override; member in class:llvm::AMDGPUInstrInfo 93 const TargetRegisterInfo *TRI) const override; member in class:llvm::AMDGPUInstrInfo 99 int FrameIndex) const override; member in class:llvm::AMDGPUInstrInfo 103 MachineInstr *LoadMI) const override; member in class:llvm::AMDGPUInstrInfo 114 const SmallVectorImpl<unsigned> &Ops) const override; member in class:llvm::AMDGPUInstrInfo 117 SmallVectorImpl<MachineInstr *> &NewMIs) const override; member in class:llvm::AMDGPUInstrInfo 119 SmallVectorImpl<SDNode *> &NewNodes) const override; member in class:llvm::AMDGPUInstrInfo 122 unsigned *LoadRegIndex = nullptr) const override; member in class:llvm::AMDGPUInstrInfo 125 unsigned NumLoads) const override; member in class:llvm::AMDGPUInstrInfo 128 ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; member in class:llvm::AMDGPUInstrInfo 130 MachineBasicBlock::iterator MI) const override; member in class:llvm::AMDGPUInstrInfo 131 bool isPredicated(const MachineInstr *MI) const override; member in class:llvm::AMDGPUInstrInfo 133 const SmallVectorImpl<MachineOperand> &Pred2) const override; member in class:llvm::AMDGPUInstrInfo 135 std::vector<MachineOperand> &Pred) const override; member in class:llvm::AMDGPUInstrInfo 136 bool isPredicable(MachineInstr *MI) const override; member in class:llvm::AMDGPUInstrInfo 137 bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const override; member in class:llvm::AMDGPUInstrInfo [all...] |
H A D | AMDGPURegisterInfo.h | 37 BitVector getReservedRegs(const MachineFunction &MF) const override { 53 const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF) const override; member in struct:llvm::AMDGPURegisterInfo 56 RegScavenger *RS) const override; member in struct:llvm::AMDGPURegisterInfo 57 unsigned getFrameRegister(const MachineFunction &MF) const override; member in struct:llvm::AMDGPURegisterInfo
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H A D | R600InstrInfo.h | 63 const R600RegisterInfo &getRegisterInfo() const override; member in class:llvm::R600InstrInfo 67 bool KillSrc) const override; member in class:llvm::R600InstrInfo 69 MachineBasicBlock::iterator MBBI) const override; member in class:llvm::R600InstrInfo 155 unsigned getIEQOpcode() const override; member in class:llvm::R600InstrInfo 156 bool isMov(unsigned Opcode) const override; member in class:llvm::R600InstrInfo 159 const ScheduleDAG *DAG) const override; member in class:llvm::R600InstrInfo 161 bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override; member in class:llvm::R600InstrInfo 164 SmallVectorImpl<MachineOperand> &Cond, bool AllowModify) const override; member in class:llvm::R600InstrInfo 166 unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const override; member in class:llvm::R600InstrInfo 168 unsigned RemoveBranch(MachineBasicBlock &MBB) const override; member in class:llvm::R600InstrInfo 170 bool isPredicated(const MachineInstr *MI) const override; member in class:llvm::R600InstrInfo 172 bool isPredicable(MachineInstr *MI) const override; member in class:llvm::R600InstrInfo 176 const BranchProbability &Probability) const override; member in class:llvm::R600InstrInfo 180 const BranchProbability &Probability) const override ; member in class:llvm::R600InstrInfo 187 const BranchProbability &Probability) const override; member in class:llvm::R600InstrInfo 190 std::vector<MachineOperand> &Pred) const override; member in class:llvm::R600InstrInfo 193 const SmallVectorImpl<MachineOperand> &Pred2) const override; member in class:llvm::R600InstrInfo 196 MachineBasicBlock &FMBB) const override; member in class:llvm::R600InstrInfo 199 const SmallVectorImpl<MachineOperand> &Pred) const override; member in class:llvm::R600InstrInfo 201 unsigned int getPredicationCost(const MachineInstr *) const override; member in class:llvm::R600InstrInfo 205 unsigned *PredCost = nullptr) const override; member in class:llvm::R600InstrInfo 217 unsigned Channel) const override; member in class:llvm::R600InstrInfo 219 const TargetRegisterClass *getIndirectAddrRegClass() const override; member in class:llvm::R600InstrInfo 224 unsigned OffsetReg) const override; member in class:llvm::R600InstrInfo 229 unsigned OffsetReg) const override; member in class:llvm::R600InstrInfo 259 unsigned DstReg, unsigned SrcReg) const override; member in class:llvm::R600InstrInfo [all...] |
H A D | SIInstrInfo.h | 61 const SIRegisterInfo &getRegisterInfo() const override { 68 bool KillSrc) const override; member in class:llvm::SIInstrInfo 74 const TargetRegisterInfo *TRI) const override; member in class:llvm::SIInstrInfo 80 const TargetRegisterInfo *TRI) const override; member in class:llvm::SIInstrInfo 87 bool NewMI=false) const override; member in class:llvm::SIInstrInfo 92 unsigned getIEQOpcode() const override { 98 unsigned DstReg, unsigned SrcReg) const override; member in class:llvm::SIInstrInfo 99 bool isMov(unsigned Opcode) const override; member in class:llvm::SIInstrInfo 101 bool isSafeToMoveRegClassDefs(const TargetRegisterClass *RC) const override; member in class:llvm::SIInstrInfo 114 StringRef &ErrInfo) const override; member in class:llvm::SIInstrInfo 156 unsigned Channel) const override; member in class:llvm::SIInstrInfo 158 const TargetRegisterClass *getIndirectAddrRegClass() const override; member in class:llvm::SIInstrInfo 164 unsigned OffsetReg) const override; member in class:llvm::SIInstrInfo 170 unsigned OffsetReg) const override; member in class:llvm::SIInstrInfo [all...] |
/external/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcELFObjectWriter.cpp | 32 bool IsPCRel) const override; member in class:__anon26136::SparcELFObjectWriter
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/external/llvm/lib/Target/Sparc/ |
H A D | SparcInstrInfo.h | 56 int &FrameIndex) const override; member in class:llvm::SparcInstrInfo 64 int &FrameIndex) const override; member in class:llvm::SparcInstrInfo 69 bool AllowModify = false) const override ; member in class:llvm::SparcInstrInfo 71 unsigned RemoveBranch(MachineBasicBlock &MBB) const override; member in class:llvm::SparcInstrInfo 76 DebugLoc DL) const override; member in class:llvm::SparcInstrInfo 81 bool KillSrc) const override; member in class:llvm::SparcInstrInfo 87 const TargetRegisterInfo *TRI) const override; member in class:llvm::SparcInstrInfo 93 const TargetRegisterInfo *TRI) const override; member in class:llvm::SparcInstrInfo
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/external/llvm/lib/Target/SystemZ/Disassembler/ |
H A D | SystemZDisassembler.cpp | 35 raw_ostream &cStream) const override; member in class:__anon26146::SystemZDisassembler
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