/external/qemu/tcg/i386/ |
H A D | tcg-target.c | 155 tcg_regset_set_reg(ct->u.regs, TCG_REG_EAX); 159 tcg_regset_set_reg(ct->u.regs, TCG_REG_EBX); 163 tcg_regset_set_reg(ct->u.regs, TCG_REG_ECX); 167 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDX); 171 tcg_regset_set_reg(ct->u.regs, TCG_REG_ESI); 175 tcg_regset_set_reg(ct->u.regs, TCG_REG_EDI); 180 tcg_regset_set32(ct->u.regs, 0, 0xffff); 182 tcg_regset_set32(ct->u.regs, 0, 0xf); 187 tcg_regset_set32(ct->u.regs, 0, 0xf); 192 tcg_regset_set32(ct->u.regs, [all...] |
/external/qemu/tcg/ |
H A D | tcg.c | 1263 if (tcg_regset_test_reg(arg_ct->u.regs, i)) 1315 tcg_regset_clear(def->args_ct[i].u.regs); 2027 ts->reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2075 ots->reg = tcg_reg_alloc(s, oarg_ct->u.regs, allocated_regs); 2117 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2131 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2156 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2162 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs); 2208 tcg_regset_test_reg(arg_ct->u.regs, reg)) { 2211 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_reg [all...] |
/external/qemu/ |
H A D | cpu-exec.c | 474 && ((IS_M(env) && env->regs[15] < 0xfffffff0) 886 # define REG_sig(reg_name, context) ((context)->uc_mcontext.regs->reg_name) 896 # define FLOAT_sig(reg_num, context) (((double*)((char*)((context)->uc_mcontext.regs+48*4)))[reg_num]) 897 # define FPSCR_sig(context) (*(int*)((char*)((context)->uc_mcontext.regs+(48+32*2)*4))) 1008 uint32_t *regs = (uint32_t *)(info + 1); local 1009 void *sigmask = (regs + 20); 1011 unsigned long pc = regs[1];
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H A D | gdbstub.c | 518 GET_REGL(env->regs[gpr_map[n]]); 547 /* 8...15 x87 regs. */ 556 /* 24+ xmm regs. */ 567 env->regs[gpr_map[i]] = ldtul_p(mem_buf); 606 /* 8...15 x87 regs. */ 619 /* 24+ xmm regs. */ 631 regs and PC, MSR, CR, and so forth. We hack round this by giving the 632 FP regs zero size when talking to a newer gdb. */ 862 the FPA registers appear in between core integer regs and the CPSR. 863 We hack round this by giving the FPA regs zer [all...] |
/external/chromium_org/v8/src/mips/ |
H A D | macro-assembler-mips.cc | 1021 void MacroAssembler::MultiPush(RegList regs) { argument 1022 int16_t num_to_push = NumberOfBitsSet(regs); 1027 if ((regs & (1 << i)) != 0) { 1035 void MacroAssembler::MultiPushReversed(RegList regs) { argument 1036 int16_t num_to_push = NumberOfBitsSet(regs); 1041 if ((regs & (1 << i)) != 0) { 1049 void MacroAssembler::MultiPop(RegList regs) { argument 1053 if ((regs & (1 << i)) != 0) { 1062 void MacroAssembler::MultiPopReversed(RegList regs) { argument 1066 if ((regs 1075 MultiPushFPU(RegList regs) argument 1089 MultiPushReversedFPU(RegList regs) argument 1103 MultiPopFPU(RegList regs) argument 1116 MultiPopReversedFPU(RegList regs) argument 5953 RegList regs = 0; local 6007 RegList regs = 0; local [all...] |
H A D | macro-assembler-mips.h | 636 void MultiPush(RegList regs); 637 void MultiPushReversed(RegList regs); 639 void MultiPushFPU(RegList regs); 640 void MultiPushReversedFPU(RegList regs); 684 // registers specified in regs. Pop order is the opposite as in MultiPush. 685 void MultiPop(RegList regs); 686 void MultiPopReversed(RegList regs); 688 void MultiPopFPU(RegList regs); 689 void MultiPopReversedFPU(RegList regs);
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/external/chromium_org/v8/src/mips64/ |
H A D | macro-assembler-mips64.cc | 1151 void MacroAssembler::MultiPush(RegList regs) { argument 1152 int16_t num_to_push = NumberOfBitsSet(regs); 1157 if ((regs & (1 << i)) != 0) { 1165 void MacroAssembler::MultiPushReversed(RegList regs) { argument 1166 int16_t num_to_push = NumberOfBitsSet(regs); 1171 if ((regs & (1 << i)) != 0) { 1179 void MacroAssembler::MultiPop(RegList regs) { argument 1183 if ((regs & (1 << i)) != 0) { 1192 void MacroAssembler::MultiPopReversed(RegList regs) { argument 1196 if ((regs 1205 MultiPushFPU(RegList regs) argument 1219 MultiPushReversedFPU(RegList regs) argument 1233 MultiPopFPU(RegList regs) argument 1246 MultiPopReversedFPU(RegList regs) argument 5938 RegList regs = 0; local 5992 RegList regs = 0; local [all...] |
H A D | macro-assembler-mips64.h | 658 void MultiPush(RegList regs); 659 void MultiPushReversed(RegList regs); 661 void MultiPushFPU(RegList regs); 662 void MultiPushReversedFPU(RegList regs); 709 // registers specified in regs. Pop order is the opposite as in MultiPush. 710 void MultiPop(RegList regs); 711 void MultiPopReversed(RegList regs); 713 void MultiPopFPU(RegList regs); 714 void MultiPopReversedFPU(RegList regs);
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/external/chromium_org/sandbox/linux/bpf_dsl/ |
H A D | bpf_dsl_more_unittest.cc | 2033 // regs should contain the current set of registers of the child, obtained using 2036 // Depending on the architecture, this may modify regs, so the caller is 2038 long SetSyscall(pid_t pid, regs_struct* regs, int syscall_number) { 2046 SECCOMP_PT_SYSCALL(*regs) = syscall_number; 2137 regs_struct regs; 2138 BPF_ASSERT_NE(-1, ptrace(PTRACE_GETREGS, pid, NULL, ®s)); 2139 switch (SECCOMP_PT_SYSCALL(regs)) { 2143 if (SECCOMP_PT_PARM1(regs) == STDOUT_FILENO) { 2144 BPF_ASSERT_NE(-1, SetSyscall(pid, ®s, -1)); 2145 SECCOMP_PT_RESULT(regs) [all...] |
/external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/x86/ |
H A D | x86expr.c | 35 int *regs; /* total multiplier for each reg */ member in struct:x86_checkea_reg3264_data 42 * Overwrites ei with intnum of 0 (to eliminate regs from the final expr). 89 return &data->regs[*regnum]; 97 * Overwrites ei with intnum of 0 (to eliminate regs from the final expr). 674 int regcount = 17; /* normally don't check SIMD regs */ 692 reg3264_data.regs = reg3264mult;
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/external/oprofile/module/x86/ |
H A D | op_model_p4.c | 625 struct pt_regs * const regs) 659 op_do_profile(cpu, instruction_pointer(regs), IRQ_ENABLED(regs), i); 623 p4_check_ctrs(unsigned int const cpu, struct op_msrs const * const msrs, struct pt_regs * const regs) argument
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/external/valgrind/main/coregrind/ |
H A D | m_signals.c | 318 struct pt_regs *regs; 321 The regs pointer of that struct ends up at the same offset as the 324 regs are followed in memory by the floating point regs on 2.4.20. 330 There is another subtlety: 2.4.20 doesn't save the vector regs when 331 delivering a signal, and 2.6.x only saves the vector regs if the 333 the vector regs, it sets the MSR_VEC bit in 393 /* Convert the value in uc_mcontext.regs[0] into a SysRes. */ \ 394 VG_(mk_SysRes_arm64_linux)( (uc)->uc_mcontext.regs[0] ) 398 (srP)->misc.ARM64.x29 = (uc)->uc_mcontext.regs[2 [all...] |
/external/lldb/scripts/Python/interface/ |
H A D | SBFrame.i | 346 __swig_getmethods__["regs"] = GetRegisters 347 if _newclass: regs = property(GetRegisters, None, doc='''A read only property that returns a list() that contains a collection of lldb.SBValue objects that represent the CPU registers for this stack frame.''')
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/external/qemu/target-i386/ |
H A D | machine.c | 36 qemu_put_betls(f, &env->regs[i]); 159 qemu_get_betls(f, &env->regs[i]);
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H A D | smm_helper.c | 94 stq_phys(sm_state + 0x7ff8 - i * 8, env->regs[i]); 220 env->regs[i] = ldq_phys(sm_state + 0x7ff8 - i * 8);
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/external/valgrind/main/include/vki/ |
H A D | vki-arm-linux.h | 824 * normal regs, with special meaning for the segment descriptors.. 857 struct vki_vm86_regs regs; member in struct:vki_vm86_struct 875 struct vki_vm86_regs regs; member in struct:vki_vm86plus_struct
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H A D | vki-x86-linux.h | 836 * normal regs, with special meaning for the segment descriptors.. 869 struct vki_vm86_regs regs; member in struct:vki_vm86_struct 887 struct vki_vm86_regs regs; member in struct:vki_vm86plus_struct
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/external/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 1995 for r = 0 to regs-1 1998 for r = 0 to regs-1 2017 uint32_t regs; // number of registers local 2025 regs = Bits32(opcode, 7, 0) / 2; 2026 // if regs == 0 || regs > 16 || (d+regs) > 32 then UNPREDICTABLE; 2027 if (regs == 0 || regs > 16 || (d + regs) > 3 2113 uint32_t regs; // number of registers local 10649 uint32_t regs; local 10841 uint32_t regs; local 11291 uint32_t regs; local 11633 uint32_t regs; local 11959 uint32_t regs; local [all...] |
/external/kernel-headers/original/uapi/asm-x86/asm/ |
H A D | kvm.h | 119 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
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/external/linux-tools-perf/perf-3.12.0/arch/x86/include/uapi/asm/ |
H A D | kvm.h | 119 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
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/external/linux-tools-perf/perf-3.12.0/tools/perf/util/ |
H A D | event.h | 79 u64 *regs; member in struct:regs_dump
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/external/qemu/android/config/linux-x86/asm/ |
H A D | kvm.h | 96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
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/external/qemu/android/config/linux-x86_64/asm/ |
H A D | kvm.h | 96 char regs[KVM_APIC_REG_SIZE]; member in struct:kvm_lapic_state
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/external/qemu/hw/arm/ |
H A D | boot.c | 226 env->regs[15] = entry & 0xfffffffe;
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/external/chromium_org/third_party/x86inc/ |
H A D | x86inc.asm | 123 ; %2 = number of registers used. pushes callee-saved regs if needed. 124 ; %3 = number of xmm registers used. pushes callee-saved xmm regs if needed. 304 %macro PROLOGUE 2-4+ 0 ; #args, #regs, #xmm_regs, arg_names... 386 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names... 446 %macro PROLOGUE 2-4+ ; #args, #regs, #xmm_regs, arg_names...
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