/external/llvm/lib/Target/Mips/InstPrinter/ |
H A D | MipsInstPrinter.cpp | 190 const MCOperand &Op = MI->getOperand(OpNo); local 191 if (Op.isReg()) { 192 printRegName(O, Op.getReg()); 196 if (Op.isImm()) { 197 O << Op.getImm(); 201 assert(Op.isExpr() && "unknown operand kind in printOperand"); 202 printExpr(Op.getExpr(), O);
|
/external/llvm/lib/Target/NVPTX/InstPrinter/ |
H A D | NVPTXInstPrinter.cpp | 84 const MCOperand &Op = MI->getOperand(OpNo); local 85 if (Op.isReg()) { 86 unsigned Reg = Op.getReg(); 88 } else if (Op.isImm()) { 89 O << markup("<imm:") << formatImm(Op.getImm()) << markup(">"); 91 assert(Op.isExpr() && "Unknown operand kind in printOperand"); 92 O << *Op.getExpr(); 285 const MCOperand &Op = MI->getOperand(OpNum); local 286 assert(Op.isExpr() && "Call prototype is not an MCExpr?"); 287 const MCExpr *Expr = Op [all...] |
/external/llvm/lib/Target/PowerPC/InstPrinter/ |
H A D | PPCInstPrinter.cpp | 339 const MCOperand &Op = MI->getOperand(OpNo); local 340 if (Op.isReg()) { 341 const char *RegName = getRegisterName(Op.getReg()); 350 if (Op.isImm()) { 351 O << Op.getImm(); 355 assert(Op.isExpr() && "unknown operand kind in printOperand"); 356 O << *Op.getExpr();
|
/external/llvm/lib/Target/R600/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 144 // Check for additional literals in SRC0/1/2 (Op 1/2/3) 152 const MCOperand &Op = MI.getOperand(i); local 153 if (getLitEncoding(Op) != 255) 158 if (Op.isImm()) 159 Imm.I = Op.getImm(); 161 Imm.F = Op.getFPImm();
|
/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 52 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 199 SparcDAGToDAGISel::SelectInlineAsmMemoryOperand(const SDValue &Op, argument 206 if (!SelectADDRrr(Op, Op0, Op1)) 207 SelectADDRri(Op, Op0, Op1);
|
/external/llvm/lib/Target/X86/InstPrinter/ |
H A D | X86ATTInstPrinter.cpp | 63 void X86ATTInstPrinter::printSSECC(const MCInst *MI, unsigned Op, argument 65 int64_t Imm = MI->getOperand(Op).getImm() & 0xf; 87 void X86ATTInstPrinter::printAVXCC(const MCInst *MI, unsigned Op, argument 89 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f; 127 void X86ATTInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op, argument 129 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 143 const MCOperand &Op = MI->getOperand(OpNo); local 144 if (Op.isImm()) 145 O << formatImm(Op.getImm()); 147 assert(Op 164 const MCOperand &Op = MI->getOperand(OpNo); local 184 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument 230 printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument 249 printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument 260 printMemOffset(const MCInst *MI, unsigned Op, raw_ostream &O) argument [all...] |
H A D | X86IntelInstPrinter.cpp | 53 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op, argument 55 int64_t Imm = MI->getOperand(Op).getImm() & 0xf; 77 void X86IntelInstPrinter::printAVXCC(const MCInst *MI, unsigned Op, argument 79 int64_t Imm = MI->getOperand(Op).getImm() & 0x1f; 117 void X86IntelInstPrinter::printRoundingControl(const MCInst *MI, unsigned Op, argument 119 int64_t Imm = MI->getOperand(Op).getImm() & 0x3; 132 const MCOperand &Op = MI->getOperand(OpNo); local 133 if (Op.isImm()) 134 O << formatImm(Op.getImm()); 136 assert(Op 153 const MCOperand &Op = MI->getOperand(OpNo); local 164 printMemReference(const MCInst *MI, unsigned Op, raw_ostream &O) argument 216 printSrcIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument 230 printDstIdx(const MCInst *MI, unsigned Op, raw_ostream &O) argument 238 printMemOffset(const MCInst *MI, unsigned Op, raw_ostream &O) argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86AtomicExpandPass.cpp | 130 AtomicRMWInst::BinOp Op = AI->getOperation(); 131 switch (Op) { 173 static Value *performAtomicOp(AtomicRMWInst::BinOp Op, IRBuilder<> &Builder, argument 176 switch (Op) {
|
/external/llvm/utils/TableGen/ |
H A D | DAGISelEmitter.cpp | 46 Record *Op = P->getOperator(); local 47 if (Op->isSubClassOf("Instruction")) { 49 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op); 65 Record *Op = P->getOperator(); local 66 if (Op->isSubClassOf("Instruction")) { 67 Cost += Op->getValueAsInt("CodeSize");
|
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPUISelLowering.cpp | 79 SDValue AMDGPUTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) argument 82 switch (Op.getOpcode()) { 84 Op.getNode()->dump(); 89 case ISD::SDIV: return LowerSDIV(Op, DAG); 90 case ISD::SREM: return LowerSREM(Op, DAG); 91 case ISD::BUILD_VECTOR: return LowerBUILD_VECTOR(Op, DAG); 92 case ISD::SIGN_EXTEND_INREG: return LowerSIGN_EXTEND_INREG(Op, DAG); 93 case ISD::BRCOND: return LowerBRCOND(Op, DAG); 95 case ISD::INTRINSIC_WO_CHAIN: return LowerINTRINSIC_WO_CHAIN(Op, DAG); 96 case ISD::UDIVREM: return LowerUDIVREM(Op, DA 101 LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const argument 149 LowerIntrinsicIABS(SDValue Op, SelectionDAG &DAG) const argument 163 LowerIntrinsicLRP(SDValue Op, SelectionDAG &DAG) const argument 180 LowerUDIVREM(SDValue Op, SelectionDAG &DAG) const argument [all...] |
H A D | R600ISelLowering.cpp | 245 SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const argument 247 switch (Op.getOpcode()) { 248 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); 249 case ISD::BR_CC: return LowerBR_CC(Op, DAG); 250 case ISD::ROTL: return LowerROTL(Op, DAG); 251 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); 252 case ISD::SETCC: return LowerSETCC(Op, DAG); 254 SDValue Chain = Op.getOperand(0); 256 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); 261 int64_t RegIndex = cast<ConstantSDNode>(Op 332 LowerBR_CC(SDValue Op, SelectionDAG &DAG) const argument 374 LowerROTL(SDValue Op, SelectionDAG &DAG) const argument 387 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument 499 LowerSETCC(SDValue Op, SelectionDAG &DAG) const argument [all...] |
H A D | SIISelLowering.cpp | 261 SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const argument 263 switch (Op.getOpcode()) { 264 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG); 265 case ISD::BR_CC: return LowerBR_CC(Op, DAG); 266 case ISD::LOAD: return LowerLOAD(Op, DAG); 267 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG); 268 case ISD::AND: return Loweri1ContextSwitch(Op, DAG, ISD::AND); 271 cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); 272 EVT VT = Op.getValueType(); 277 default: return AMDGPUTargetLowering::LowerOperation(Op, DA 293 Loweri1ContextSwitch(SDValue Op, SelectionDAG &DAG, unsigned VCCNode) const argument 308 LowerBR_CC(SDValue Op, SelectionDAG &DAG) const argument 332 LowerLOAD(SDValue Op, SelectionDAG &DAG) const argument 374 LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const argument [all...] |
/external/chromium_org/third_party/skia/experimental/Intersection/ |
H A D | ShapeOps.cpp | 10 namespace Op { namespace 213 } // end of Op namespace 218 Op::gDebugSortCount = Op::gDebugSortCountDefault; 223 SkTArray<Op::Contour> contours; 225 Op::EdgeBuilder builder(one, contours); 230 SkTDArray<Op::Contour*> contourList; 233 Op::Contour** currentPtr = contourList.begin(); 237 Op::Contour** listEnd = contourList.end(); 240 Op [all...] |
/external/chromium_org/third_party/skia/include/core/ |
H A D | SkRegion.h | 240 enum Op { enum in class:SkRegion 255 * Set this region to the result of applying the Op to this region and the 259 bool op(const SkIRect& rect, Op op) { return this->op(*this, rect, op); } 262 * Set this region to the result of applying the Op to this region and the 266 bool op(int left, int top, int right, int bottom, Op op) { 273 * Set this region to the result of applying the Op to this region and the 277 bool op(const SkRegion& rgn, Op op) { return this->op(*this, rgn, op); } 280 * Set this region to the result of applying the Op to the specified 284 bool op(const SkIRect& rect, const SkRegion& rgn, Op); 287 * Set this region to the result of applying the Op t [all...] |
/external/chromium_org/third_party/skia/src/pathops/ |
H A D | SkPathOpsOp.cpp | 248 bool Op(const SkPath& one, const SkPath& two, SkPathOp op, SkPath* result) { function
|
/external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
H A D | ExprEngine.h | 470 SVal evalBinOp(ProgramStateRef ST, BinaryOperator::Opcode Op, argument 472 return svalBuilder.evalBinOp(ST, Op, LHS, RHS, T);
|
/external/clang/lib/AST/ |
H A D | ExprClassification.cpp | 226 const Expr *Op = cast<UnaryOperator>(E)->getSubExpr()->IgnoreParens(); local 227 Cl::Kinds K = ClassifyInternal(Ctx, Op); 230 if (isa<ObjCPropertyRefExpr>(Op))
|
/external/clang/lib/Analysis/ |
H A D | BodyFarm.cpp | 54 BinaryOperator::Opcode Op); 96 BinaryOperator::Opcode Op) { 97 assert(BinaryOperator::isLogicalOp(Op) || 98 BinaryOperator::isComparisonOp(Op)); 101 Op, 95 makeComparison(const Expr *LHS, const Expr *RHS, BinaryOperator::Opcode Op) argument
|
/external/clang/lib/StaticAnalyzer/Checkers/ |
H A D | TestAfterDivZeroChecker.cpp | 108 BinaryOperator::Opcode Op = BO->getOpcode(); local 109 if (Op == BO_Div || Op == BO_Rem || Op == BO_DivAssign || 110 Op == BO_RemAssign) { 204 BinaryOperator::Opcode Op = B->getOpcode(); local 205 if (Op == BO_Div || Op == BO_Rem || Op == BO_DivAssign || 206 Op [all...] |
/external/clang/lib/StaticAnalyzer/Core/ |
H A D | SimpleConstraintManager.cpp | 159 BinaryOperator::Opcode Op = SSE->getOpcode(); local 160 assert(BinaryOperator::isComparisonOp(Op)); 170 Op = BinaryOperator::reverseComparisonOp(Op); 172 Op = BinaryOperator::negateComparisonOp(Op); 173 return assumeSymRel(state, Subtraction, Op, Zero); 196 BinaryOperator::Opcode Op = SE->getOpcode(); local 197 if (Op == BO_Add || Op [all...] |
/external/llvm/include/llvm/Analysis/ |
H A D | IVUsers.h | 61 void setOperandValToReplace(Value *Op) { argument 62 OperandValToReplace = Op;
|
H A D | TargetFolder.h | 167 Constant *CreateCast(Instruction::CastOps Op, Constant *C, argument 171 return Fold(ConstantExpr::getCast(Op, C, DestTy));
|
/external/llvm/include/llvm/IR/ |
H A D | ConstantFolder.h | 155 Constant *CreateCast(Instruction::CastOps Op, Constant *C, argument 157 return ConstantExpr::getCast(Op, C, DestTy);
|
/external/llvm/include/llvm/MC/ |
H A D | MCTargetAsmParser.h | 171 virtual unsigned validateTargetOperandClass(MCParsedAsmOperand &Op, argument
|
/external/llvm/lib/Bitcode/Writer/ |
H A D | ValueEnumerator.cpp | 82 for (const Use &Op : I.operands()) { 83 if (MDNode *MD = dyn_cast<MDNode>(&Op)) 87 EnumerateOperandType(Op); 404 const Value *Op = C->getOperand(i); local 408 if (isa<BasicBlock>(Op)) continue; 410 EnumerateOperandType(Op);
|