Searched refs:TM (Results 251 - 275 of 414) sorted by relevance

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/external/mesa3d/src/gallium/drivers/radeon/
H A DR600InstrInfo.cpp30 TM(tm)
144 DFAPacketizer *R600InstrInfo::CreateTargetScheduleState(const TargetMachine *TM, argument
147 const InstrItineraryData *II = TM->getInstrItineraryData();
148 return TM->getSubtarget<AMDGPUSubtarget>().createDFAPacketizer(II);
H A DR600RegisterInfo.cpp23 TM(tm),
/external/llvm/include/llvm/CodeGen/
H A DAsmPrinter.h65 TargetMachine &TM; member in class:llvm::AsmPrinter
129 explicit AsmPrinter(TargetMachine &TM, MCStreamer &Streamer);
H A DSelectionDAGISel.h43 TargetMachine &TM; member in class:llvm::SelectionDAGISel
60 return TM.getTargetLowering();
/external/llvm/include/llvm/
H A DPassSupport.h88 template <typename PassName> Pass *callTargetMachineCtor(TargetMachine *TM) { argument
89 return new PassName(TM);
/external/llvm/lib/Target/ARM/
H A DARMSubtarget.cpp152 const std::string &FS, TargetMachine &TM,
164 TLInfo(TM),
151 ARMSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, TargetMachine &TM, bool IsLittle, const TargetOptions &Options) argument
/external/llvm/lib/Target/Mips/
H A DMipsOptimizePICCall.cpp299 FunctionPass *llvm::createMipsOptimizePICCallPass(MipsTargetMachine &TM) { argument
300 return new OptimizePICCall(TM);
/external/llvm/lib/Target/R600/
H A DR600ClauseMergePass.cpp203 llvm::FunctionPass *llvm::createR600ClauseMergePass(TargetMachine &TM) { argument
204 return new R600ClauseMergePass(TM);
/external/llvm/lib/Target/SystemZ/
H A DSystemZAsmPrinter.cpp188 uint64_t Size = TM.getDataLayout()->getTypeAllocSize(ZCPV->getType());
232 const DataLayout *TD = TM.getDataLayout();
H A DSystemZISelLowering.h63 TM, enumerator in enum:llvm::SystemZISD::__anon26154
201 explicit SystemZTargetLowering(const TargetMachine &TM);
/external/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h97 explicit XCoreTargetLowering(const TargetMachine &TM);
126 const TargetMachine &TM; member in class:llvm::XCoreTargetLowering
/external/llvm/include/llvm/Support/
H A DTargetRegistry.h102 typedef AsmPrinter *(*AsmPrinterCtorTy)(TargetMachine &TM,
384 AsmPrinter *createAsmPrinter(TargetMachine &TM, MCStreamer &Streamer) const{ argument
387 return AsmPrinterCtorFn(TM, Streamer);
1132 static AsmPrinter *Allocator(TargetMachine &TM, MCStreamer &Streamer) { argument
1133 return new AsmPrinterImpl(TM, Streamer);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DFunctionLoweringInfo.cpp60 const TargetLowering *TLI = TM.getTargetLowering();
109 unsigned StackAlign = TM.getFrameLowering()->getStackAlignment();
249 createVirtualRegister(TM.getTargetLowering()->getRegClassFor(VT));
260 const TargetLowering *TLI = TM.getTargetLowering();
309 const TargetLowering *TLI = TM.getTargetLowering();
H A DSelectionDAGBuilder.cpp1021 RegsForValue RFV(*DAG.getContext(), *TM.getTargetLowering(),
1053 const TargetLowering *TLI = TM.getTargetLowering();
1187 const TargetLowering *TLI = TM.getTargetLowering();
1278 Chain = TM.getTargetLowering()->LowerReturn(Chain, CallConv, isVarArg,
1400 if (TM.Options.NoNaNsFPMath)
1574 if (Succ0MBB != NextBlock || TM.getOptLevel() == CodeGenOpt::None)
1604 if (!TM.getTargetLowering()->isJumpExpensive() &&
1727 EVT PTy = TM.getTargetLowering()->getPointerTy();
1755 const TargetLowering *TLI = TM.getTargetLowering();
1802 const TargetLowering *TLI = TM
[all...]
/external/llvm/lib/Target/Hexagon/
H A DHexagonMachineScheduler.cpp208 const TargetMachine &TM = DAG->MF.getTarget(); local
211 Top.HazardRec = TM.getInstrInfo()->CreateTargetMIHazardRecognizer(Itin, DAG);
212 Bot.HazardRec = TM.getInstrInfo()->CreateTargetMIHazardRecognizer(Itin, DAG);
216 Top.ResourceModel = new VLIWResourceModel(TM, DAG->getSchedModel());
217 Bot.ResourceModel = new VLIWResourceModel(TM, DAG->getSchedModel());
/external/chromium_org/third_party/harfbuzz-ng/src/
H A Dhb-ot-shape-complex-indic-table.cc104 /* 0950 */ _(x,x), _(TM,x), _(TM,x), _(x,x), _(x,x), _(M,T), _(M,B), _(M,B),
292 /* 1030 */ _(M,B), _(M,L), _(M,T), _(M,T), _(M,T), _(M,T), _(Bi,x), _(TM,x),
298 /* 1060 */ _(CM,x), _(C,x), _(M,R), _(TM,x), _(TM,x), _(C,x), _(C,x), _(M,R),
299 /* 1068 */ _(M,R), _(TM,x), _(TM,x), _(TM,x), _(TM,x), _(TM,
[all...]
/external/harfbuzz_ng/src/
H A Dhb-ot-shape-complex-indic-table.cc104 /* 0950 */ _(x,x), _(TM,x), _(TM,x), _(x,x), _(x,x), _(M,T), _(M,B), _(M,B),
292 /* 1030 */ _(M,B), _(M,L), _(M,T), _(M,T), _(M,T), _(M,T), _(Bi,x), _(TM,x),
298 /* 1060 */ _(CM,x), _(C,x), _(M,R), _(TM,x), _(TM,x), _(C,x), _(C,x), _(M,R),
299 /* 1068 */ _(M,R), _(TM,x), _(TM,x), _(TM,x), _(TM,x), _(TM,
[all...]
/external/llvm/lib/Target/NVPTX/
H A DNVPTXAsmPrinter.cpp143 if (Constant *C = ConstantFoldConstantExpression(CE, AP.TM.getDataLayout()))
172 const DataLayout &TD = *AP.TM.getDataLayout();
196 const DataLayout &TD = *AP.TM.getDataLayout();
206 const DataLayout &TD = *AP.TM.getDataLayout();
287 //const TargetMachine &TM = MF->getTarget();
584 TargetMachine &TM = const_cast<TargetMachine&>(MF->getTarget()); local
585 NVPTXTargetMachine &nvTM = static_cast<NVPTXTargetMachine&>(TM);
596 const NVPTXSubtarget &ST = TM.getSubtarget<NVPTXSubtarget>();
707 const DataLayout *TD = TM.getDataLayout();
708 const TargetLowering *TLI = TM
[all...]
/external/clang/lib/Lex/
H A DPPMacroExpansion.cpp819 struct tm *TM = localtime(&TT);
828 TmpStream << llvm::format("\"%s %2d %4d\"", Months[TM->tm_mon],
829 TM->tm_mday, TM->tm_year + 1900);
840 TM->tm_hour, TM->tm_min, TM->tm_sec);
1347 struct tm *TM = localtime(&TT);
1348 Result = asctime(TM);
/external/llvm/lib/CodeGen/
H A DMachineSink.cpp216 const TargetMachine &TM = MF.getTarget(); local
217 TII = TM.getInstrInfo();
218 TRI = TM.getRegisterInfo();
H A DRegisterScavenging.cpp73 const TargetMachine &TM = MF.getTarget(); local
74 TII = TM.getInstrInfo();
75 TRI = TM.getRegisterInfo();
/external/strace/linux/sparc/
H A Dsyscallent1.h143 { 6, TD|TM, solaris_mmap, "mmap" }, /* 115 */ variable
362 { 6, TI|TM, solaris_shmat, "shmat" }, /* 330 */ variable
364 { 6, TI|TM, solaris_shmdt, "shmdt" }, /* 332 */ variable
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUISelLowering.h42 AMDGPUTargetLowering(TargetMachine &TM);
H A DAMDGPUInstrInfo.cpp30 : AMDGPUGenInstrInfo(0,0), RI(tm, *this), TM(tm) { }
H A DAMDGPUInstrInfo.h43 TargetMachine &TM; member in class:llvm::AMDGPUInstrInfo

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