/external/llvm/lib/Target/XCore/ |
H A D | XCoreMachineFunctionInfo.h | 52 explicit XCoreFunctionInfo(MachineFunction &MF) : argument 65 int createLRSpillSlot(MachineFunction &MF); 72 int createFPSpillSlot(MachineFunction &MF); 79 const int* createEHSpillSlot(MachineFunction &MF); 97 bool isLargeFrame(const MachineFunction &MF) const;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonFrameLowering.cpp | 46 void HexagonFrameLowering::determineFrameLayout(MachineFunction &MF) const { 47 MachineFrameInfo *MFI = MF.getFrameInfo(); 53 unsigned TargetAlign = MF.getTarget().getFrameLowering()->getStackAlignment(); 76 void HexagonFrameLowering::emitPrologue(MachineFunction &MF) const { 77 MachineBasicBlock &MBB = MF.front(); 78 MachineFrameInfo *MFI = MF.getFrameInfo(); 81 static_cast<const HexagonRegisterInfo *>(MF.getTarget().getRegisterInfo()); 83 determineFrameLayout(MF); 96 MF.getInfo<HexagonMachineFunctionInfo>(); 114 if (hasFP(MF)) { 145 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 227 MachineFunction *MF = MBB.getParent(); local 282 MachineFunction *MF = MBB.getParent(); local 329 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 343 getFrameIndexOffset(const MachineFunction &MF, int FI) const argument [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FrameLowering.cpp | 39 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const { 40 return !MF.getFrameInfo()->hasVarSizedObjects(); 46 bool X86FrameLowering::hasFP(const MachineFunction &MF) const { 47 const MachineFrameInfo *MFI = MF.getFrameInfo(); 48 const MachineModuleInfo &MMI = MF.getMMI(); 49 const TargetRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo(); 51 return (MF.getTarget().Options.DisableFramePointerElim(MF) || 52 RegInfo->needsStackRealignment(MF) || 55 MF 94 const MachineFunction *MF = MBB.getParent(); local [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64FrameLowering.cpp | 42 static unsigned estimateStackSize(MachineFunction &MF) { argument 43 const MachineFrameInfo *FFI = MF.getFrameInfo(); 62 bool AArch64FrameLowering::canUseRedZone(const MachineFunction &MF) const { 67 if (MF.getFunction()->getAttributes().hasAttribute( 71 const MachineFrameInfo *MFI = MF.getFrameInfo(); 72 const AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>(); 78 if (MFI->hasCalls() || hasFP(MF) || NumBytes > 128) 85 bool AArch64FrameLowering::hasFP(const MachineFunction &MF) const { 86 const MachineFrameInfo *MFI = MF.getFrameInfo(); 89 const TargetRegisterInfo *RegInfo = MF 108 eliminateCallFramePseudoInstr( MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument 432 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 530 getFrameIndexOffset(const MachineFunction &MF, int FI) const argument 540 getFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg) const argument 546 resolveFrameIndexReference(const MachineFunction &MF, int FI, unsigned &FrameReg, bool PreferFP) const argument 605 getPrologueDeath(MachineFunction &MF, unsigned Reg) argument 619 MachineFunction &MF = *MBB.getParent(); local 695 MachineFunction &MF = *MBB.getParent(); local 761 processFunctionBeforeCalleeSavedScan( MachineFunction &MF, RegScavenger *RS) const argument [all...] |
H A D | AArch64StorePairSuppress.cpp | 33 MachineFunction *MF; member in class:__anon25948::AArch64StorePairSuppress 120 MF = &mf; 121 TII = static_cast<const AArch64InstrInfo *>(MF->getTarget().getInstrInfo()); 122 TRI = MF->getTarget().getRegisterInfo(); 123 MRI = &MF->getRegInfo(); 125 MF->getTarget().getSubtarget<TargetSubtargetInfo>(); 131 DEBUG(dbgs() << "*** " << getPassName() << ": " << MF->getName() << '\n'); 142 for (auto &MBB : *MF) {
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | AMDGPURegisterInfo.h | 38 virtual BitVector getReservedRegs(const MachineFunction &MF) const { 53 const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const; 56 unsigned getFrameRegister(const MachineFunction &MF) const;
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H A D | AMDGPUAsmPrinter.cpp | 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { argument 43 MF.dump(); 45 SetupMachineFunction(MF); 47 EmitProgramInfo(MF); 54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) { argument 61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 124 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
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/external/llvm/include/llvm/CodeGen/ |
H A D | CalcSpillWeights.h | 50 MachineFunction &MF; member in class:llvm::VirtRegAuxInfo 62 : MF(mf), LIS(lis), Loops(loops), MBFI(mbfi), normalize(norm) {} 70 void calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF,
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H A D | EdgeBundles.h | 27 const MachineFunction *MF; member in class:llvm::EdgeBundles 52 const MachineFunction *getMachineFunction() const { return MF; }
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H A D | MachineFunctionAnalysis.h | 29 MachineFunction *MF; member in struct:llvm::MachineFunctionAnalysis 36 MachineFunction &getMF() const { return *MF; }
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/external/llvm/lib/CodeGen/ |
H A D | AllocationOrder.cpp | 34 const MachineFunction &MF = VRM.getMachineFunction(); local 36 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); 37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
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H A D | EdgeBundles.cpp | 40 MF = &mf; 42 EC.grow(2 * MF->getNumBlockIDs()); 44 for (const auto &MBB : *MF) { 59 for (unsigned i = 0, e = MF->getNumBlockIDs(); i != e; ++i) { 76 const MachineFunction *MF = G.getMachineFunction(); local 79 for (const auto &MBB : *MF) {
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/external/llvm/lib/CodeGen/AsmPrinter/ |
H A D | DwarfException.h | 52 void beginFunction(const MachineFunction *MF) override; 79 void beginFunction(const MachineFunction *MF) override; 111 void beginFunction(const MachineFunction *MF) override;
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2RegisterInfo.cpp | 42 MachineFunction &MF = *MBB.getParent(); local 43 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo(); 44 MachineConstantPool *ConstantPool = MF.getConstantPool();
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXRegisterInfo.h | 45 getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override; 47 BitVector getReservedRegs(const MachineFunction &MF) const override; 53 unsigned getFrameRegister(const MachineFunction &MF) const override;
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPURegisterInfo.h | 37 BitVector getReservedRegs(const MachineFunction &MF) const override { 53 const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF) const override; 57 unsigned getFrameRegister(const MachineFunction &MF) const override;
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H A D | SIFixSGPRLiveRanges.cpp | 43 virtual bool runOnMachineFunction(MachineFunction &MF) override; 74 bool SIFixSGPRLiveRanges::runOnMachineFunction(MachineFunction &MF) { argument 75 MachineRegisterInfo &MRI = MF.getRegInfo(); 77 MF.getTarget().getRegisterInfo()); 80 for (MachineFunction::iterator BI = MF.begin(), BE = MF.end();
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrBuilder.h | 29 MachineFunction &MF = *MI->getParent()->getParent(); local 30 MachineFrameInfo *MFFrame = MF.getFrameInfo(); 39 MF.getMachineMemOperand(MachinePointerInfo(
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H A D | SystemZFrameLowering.cpp | 64 processFunctionBeforeCalleeSavedScan(MachineFunction &MF, argument 66 MachineFrameInfo *MFFrame = MF.getFrameInfo(); 67 MachineRegisterInfo &MRI = MF.getRegInfo(); 68 const TargetRegisterInfo *TRI = MF.getTarget().getRegisterInfo(); 69 bool HasFP = hasFP(MF); 70 SystemZMachineFunctionInfo *MFI = MF.getInfo<SystemZMachineFunctionInfo>(); 71 bool IsVarArg = MF.getFunction()->isVarArg(); 95 const MCPhysReg *CSRegs = TRI->getCalleeSavedRegs(&MF); 129 MachineFunction &MF = *MBB.getParent(); 130 const TargetInstrInfo *TII = MF 266 processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const argument 407 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 454 getFrameIndexOffset(const MachineFunction &MF, int FI) const argument 499 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const argument [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | AMDGPURegisterInfo.h | 38 virtual BitVector getReservedRegs(const MachineFunction &MF) const { 53 const uint16_t* getCalleeSavedRegs(const MachineFunction *MF) const; 56 unsigned getFrameRegister(const MachineFunction &MF) const;
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H A D | AMDGPUAsmPrinter.cpp | 40 bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) { argument 43 MF.dump(); 45 SetupMachineFunction(MF); 47 EmitProgramInfo(MF); 54 void AMDGPUAsmPrinter::EmitProgramInfo(MachineFunction &MF) { argument 61 for (MachineFunction::iterator BB = MF.begin(), BB_E = MF.end(); 124 SIMachineFunctionInfo * MFI = MF.getInfo<SIMachineFunctionInfo>();
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/external/clang/test/Layout/ |
H A D | ms-x86-member-pointers.cpp | 13 struct MF { char a; int (M::*mp)(); }; struct 53 // CHECK-NEXT: 0 | struct MF 78 sizeof(MF) +
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 39 MSP430RegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { 40 const TargetFrameLowering *TFI = MF->getTarget().getFrameLowering(); 41 const Function* F = MF->getFunction(); 65 if (TFI->hasFP(*MF)) 74 BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const { 76 const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering(); 89 if (TFI->hasFP(MF)) { 98 MSP430RegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) argument 111 MachineFunction &MF = *MBB.getParent(); local 112 const TargetFrameLowering *TFI = MF [all...] |
/external/llvm/lib/Target/Mips/ |
H A D | MipsFrameLowering.h | 34 bool hasFP(const MachineFunction &MF) const override; 37 uint64_t estimateStackSize(const MachineFunction &MF) const;
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCFrameLowering.cpp | 211 MachineFunction *MF = Entry->getParent(); local 222 for (MachineFunction::iterator I = MF->begin(), E = MF->end(); I != E; ++I) { 256 MachineFunction *MF = MI->getParent()->getParent(); local 257 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 262 if (MF->getRegInfo().isPhysRegUsed(VRRegNo[i])) 268 I = MF->getRegInfo().livein_begin(), 269 E = MF->getRegInfo().livein_end(); I != E; ++I) { 276 for (MachineFunction::const_iterator BI = MF->begin(), BE = MF 338 spillsCR(const MachineFunction &MF) argument 343 spillsVRSAVE(const MachineFunction &MF) argument 348 hasSpills(const MachineFunction &MF) argument 353 hasNonRISpills(const MachineFunction &MF) argument 360 determineFrameLayout(MachineFunction &MF, bool UpdateMF, bool UseEstimate) const argument 810 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const argument 1042 MustSaveLR(const MachineFunction &MF, unsigned LR) argument 1054 processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *) const argument 1109 processFunctionBeforeFrameFinalized(MachineFunction &MF, RegScavenger *RS) const argument 1319 addScavengingSpillSlot(MachineFunction &MF, RegScavenger *RS) const argument 1431 MachineFunction *MF = MBB.getParent(); local 1463 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const argument [all...] |