Searched refs:mir (Results 1 - 25 of 41) sorted by relevance

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/art/compiler/dex/
H A Dmir_optimization.cc46 MIR* mir; local
48 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
50 if (mir->ssa_rep == nullptr) {
54 uint64_t df_attributes = GetDataFlowAttributes(mir);
56 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
68 SetConstant(mir->ssa_rep->defs[0], vB);
71 SetConstant(mir
107 AdvanceMIR(BasicBlock** p_bb, MIR* mir) argument
131 FindMoveResult(BasicBlock* bb, MIR* mir) argument
186 SelectKind(MIR* mir) argument
678 MIR* mir = bb->last_mir_insn; local
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H A Dlocal_value_numbering.cc464 const MIR* mir = fall_through_bb->first_mir_insn; local
465 DCHECK(mir != nullptr);
467 if ((Instruction::FlagsOf(mir->dalvikInsn.opcode) & Instruction::kInvoke) != 0) {
468 for (uint16_t i = 0u; i != mir->ssa_rep->num_uses; ++i) {
469 uint16_t value_name = lvn->GetOperandValue(mir->ssa_rep->uses[i]);
933 uint16_t LocalValueNumbering::MarkNonAliasingNonNull(MIR* mir) { argument
934 uint16_t res = GetOperandValue(mir->ssa_rep->defs[0]);
975 void LocalValueNumbering::HandleNullCheck(MIR* mir, uint16_t reg) { argument
980 LOG(INFO) << "Removing null check for 0x" << std::hex << mir->offset;
982 mir
989 HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index) argument
1005 HandlePutObject(MIR* mir) argument
1019 HandlePhi(MIR* mir) argument
1080 HandleAGet(MIR* mir, uint16_t opcode) argument
1105 HandleAPut(MIR* mir, uint16_t opcode) argument
1143 HandleIGet(MIR* mir, uint16_t opcode) argument
1178 HandleIPut(MIR* mir, uint16_t opcode) argument
1247 HandleSGet(MIR* mir, uint16_t opcode) argument
1282 HandleSPut(MIR* mir, uint16_t opcode) argument
1331 HandleInvokeOrClInit(MIR* mir) argument
1345 GetValueNumber(MIR* mir) argument
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H A Dmir_dataflow.cc927 MIR* mir; local
939 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
940 uint64_t df_attributes = GetDataFlowAttributes(mir);
941 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn;
980 HandleExtended(use_v, def_v, live_in_v, mir->dalvikInsn);
1017 void MIRGraph::AllocateSSAUseData(MIR *mir, int num_uses) { argument
1018 mir
1027 AllocateSSADefData(MIR *mir, int num_defs) argument
1039 DataFlowSSAFormat35C(MIR* mir) argument
1052 DataFlowSSAFormat3RC(MIR* mir) argument
1064 DataFlowSSAFormatExtended(MIR* mir) argument
1074 MIR* mir; local
1268 InvokeUsesMethodStar(MIR* mir) argument
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H A Dpost_opt_passes.cc59 MIR* mir = bb->first_mir_insn; local
61 while (mir != nullptr) {
62 MIR* next = mir->next;
64 Instruction::Code opcode = mir->dalvikInsn.opcode;
67 bb->RemoveMIR(mir);
70 mir = next;
H A Dmir_analysis.cc904 for (MIR* mir = tbb->first_mir_insn; mir != NULL; mir = mir->next) {
905 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) {
909 uint32_t flags = analysis_attributes_[mir->dalvikInsn.opcode];
1124 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir
[all...]
H A Dmir_graph.h418 void AppendMIR(MIR* mir);
421 void PrependMIR(MIR* mir);
426 MIR* FindPreviousMIR(MIR* mir);
429 bool RemoveMIR(MIR* mir);
532 MIR* mir; member in struct:art::CallInfo
662 const MirIFieldLoweringInfo& GetIFieldLoweringInfo(MIR* mir) const {
663 DCHECK_LT(mir->meta.ifield_lowering_info, ifield_lowering_infos_.Size());
664 return ifield_lowering_infos_.GetRawStorage()[mir->meta.ifield_lowering_info];
667 const MirSFieldLoweringInfo& GetSFieldLoweringInfo(MIR* mir) const {
668 DCHECK_LT(mir
674 GetMethodLoweringInfo(MIR* mir) argument
769 GetRawSrc(MIR* mir, int num) argument
775 GetRawDest(MIR* mir) argument
781 GetDest(MIR* mir) argument
787 GetSrc(MIR* mir, int num) argument
793 GetDestWide(MIR* mir) argument
799 GetSrcWide(MIR* mir, int low) argument
[all...]
H A Dmir_graph.cc656 // TODO: will need to snapshot stack image and use that as the mir context identification.
866 uint64_t MIRGraph::GetDataFlowAttributes(MIR* mir) { argument
867 DCHECK(mir != nullptr);
868 Instruction::Code opcode = mir->dalvikInsn.opcode;
911 const MIR* mir; local
914 for (mir = bb->first_mir_insn; mir; mir = mir->next) {
915 int opcode = mir
1030 AppendMIR(MIR* mir) argument
1082 PrependMIR(MIR* mir) argument
1093 MIR* mir = *it; local
1105 FindPreviousMIR(MIR* mir) argument
1151 RemoveMIR(MIR* mir) argument
1215 GetDalvikDisassembly(const MIR* mir) argument
1452 NewMemCallInfo(BasicBlock* bb, MIR* mir, InvokeType type, bool is_range) argument
1480 MIR* mir = new (arena_) MIR(); local
[all...]
H A Dlocal_value_numbering.h77 uint16_t GetValueNumber(MIR* mir);
295 uint16_t MarkNonAliasingNonNull(MIR* mir);
299 void HandleNullCheck(MIR* mir, uint16_t reg);
300 void HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index);
301 void HandlePutObject(MIR* mir);
303 uint16_t HandlePhi(MIR* mir);
304 uint16_t HandleAGet(MIR* mir, uint16_t opcode);
305 void HandleAPut(MIR* mir, uint16_t opcode);
306 uint16_t HandleIGet(MIR* mir, uint16_t opcode);
307 void HandleIPut(MIR* mir, uint16_
[all...]
H A Dvreg_analysis.cc124 bool MIRGraph::InferTypeAndSize(BasicBlock* bb, MIR* mir, bool changed) { argument
125 SSARepresentation *ssa_rep = mir->ssa_rep;
137 uint64_t attrs = GetDataFlowAttributes(mir);
218 if ((mir->dalvikInsn.opcode == Instruction::RETURN) ||
219 (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) ||
220 (mir->dalvikInsn.opcode == Instruction::RETURN_OBJECT)) {
253 Instruction::Code opcode = mir->dalvikInsn.opcode;
255 0 : Instruction::FlagsOf(mir->dalvikInsn.opcode);
259 int target_idx = mir->dalvikInsn.vB;
263 MIR* move_result_mir = FindMoveResult(bb, mir);
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H A Dssa_transformation.cc549 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
550 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi))
552 int ssa_reg = mir->ssa_rep->defs[0];
559 AllocateSSAUseData(mir, num_uses);
560 int* uses = mir->ssa_rep->uses;
564 mir->meta.phi_incoming = incoming;
H A Dlocal_value_numbering_test.cc138 MIR* mir = &mirs_[i]; local
139 mir->dalvikInsn.opcode = def->opcode;
140 mir->dalvikInsn.vB = static_cast<int32_t>(def->value);
141 mir->dalvikInsn.vB_wide = def->value;
144 mir->meta.ifield_lowering_info = def->field_info;
147 mir->meta.sfield_lowering_info = def->field_info;
149 mir->ssa_rep = &ssa_reps_[i];
150 mir->ssa_rep->num_uses = def->num_uses;
151 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN.
152 mir
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H A Dmir_optimization_test.cc162 MIR* mir = &mirs_[i]; local
163 mir->dalvikInsn.opcode = def->opcode;
166 bb->AppendMIR(mir);
169 mir->meta.sfield_lowering_info = def->field_or_method_info;
171 mir->ssa_rep = nullptr;
172 mir->offset = 2 * i; // All insns need to be at least 2 code units long.
173 mir->optimization_flags = 0u;
/art/test/040-miranda/src/
H A DMain.java24 MirandaClass mir = new MirandaClass();
26 System.out.println(" inInterface: " + mir.inInterface());
27 System.out.println(" inInterface2: " + mir.inInterface2());
28 System.out.println(" inAbstract: " + mir.inAbstract());
31 MirandaAbstract mira = mir;
/art/test/126-miranda-multidex/src/
H A DMain.java24 MirandaClass mir = new MirandaClass();
26 System.out.println(" inInterface: " + mir.inInterface());
27 System.out.println(" inInterface2: " + mir.inInterface2());
28 System.out.println(" inAbstract: " + mir.inAbstract());
31 MirandaAbstract mira = mir;
/art/compiler/dex/quick/
H A Dmir_to_lir.cc228 bool Mir2Lir::GenSpecialIGet(MIR* mir, const InlineMethod& special) { argument
241 GenPrintLabel(mir);
268 bool Mir2Lir::GenSpecialIPut(MIR* mir, const InlineMethod& special) { argument
285 GenPrintLabel(mir);
303 bool Mir2Lir::GenSpecialIdentity(MIR* mir, const InlineMethod& special) { argument
308 GenPrintLabel(mir);
319 bool Mir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special) { argument
321 current_dalvik_offset_ = mir->offset;
328 DCHECK_EQ(mir->dalvikInsn.opcode, Instruction::RETURN_VOID);
329 return_mir = mir;
389 CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list) argument
1064 HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir) argument
1106 GenPrintLabel(MIR* mir) argument
1118 MIR* mir; local
1226 MIR* mir = bb->first_mir_insn; local
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H A Dmir_to_lir.h851 void GenSput(MIR* mir, RegLocation rl_src,
853 void GenSget(MIR* mir, RegLocation rl_dest,
855 void GenIGet(MIR* mir, int opt_flags, OpSize size,
857 void GenIPut(MIR* mir, int opt_flags, OpSize size,
1086 void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list);
1087 virtual void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir);
1323 virtual void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) = 0;
1324 virtual void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) = 0;
1329 * @param mir The MIR whose opcode is not standard extended MIR.
1332 virtual void GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir);
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/art/compiler/dex/quick/x86/
H A Dcodegen_x86.h237 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) OVERRIDE;
238 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) OVERRIDE;
239 void GenSelect(BasicBlock* bb, MIR* mir) OVERRIDE;
249 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
250 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
482 void GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir);
483 void GenShiftByteVector(BasicBlock *bb, MIR *mir);
486 void AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir);
523 * @details The mir->dalvikInsn.vA specifies an N such that vector registers
527 * @param mir whos
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H A Dtarget_x86.cc1685 void X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { argument
1686 switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
1688 ReserveVectorRegisters(mir);
1694 GenConst128(bb, mir);
1697 GenMoveVector(bb, mir);
1700 GenMultiplyVector(bb, mir);
1703 GenAddVector(bb, mir);
1706 GenSubtractVector(bb, mir);
1709 GenShiftLeftVector(bb, mir);
1712 GenSignedShiftRightVector(bb, mir);
1740 ReserveVectorRegisters(MIR* mir) argument
1785 GenConst128(BasicBlock* bb, MIR* mir) argument
1803 AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir) argument
1828 GenMoveVector(BasicBlock *bb, MIR *mir) argument
1836 GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir) argument
1878 GenMultiplyVector(BasicBlock *bb, MIR *mir) argument
1908 GenAddVector(BasicBlock *bb, MIR *mir) argument
1939 GenSubtractVector(BasicBlock *bb, MIR *mir) argument
1970 GenShiftByteVector(BasicBlock *bb, MIR *mir) argument
2019 GenShiftLeftVector(BasicBlock *bb, MIR *mir) argument
2047 GenSignedShiftRightVector(BasicBlock *bb, MIR *mir) argument
2072 GenUnsignedShiftRightVector(BasicBlock *bb, MIR *mir) argument
2100 GenAndVector(BasicBlock *bb, MIR *mir) argument
2108 GenOrVector(BasicBlock *bb, MIR *mir) argument
2116 GenXorVector(BasicBlock *bb, MIR *mir) argument
2142 GenAddReduceVector(BasicBlock *bb, MIR *mir) argument
2235 GenReduceVector(BasicBlock *bb, MIR *mir) argument
2275 GenSetVector(BasicBlock *bb, MIR *mir) argument
2348 ScanVectorLiteral(MIR *mir) argument
2359 AddVectorLiteral(MIR *mir) argument
[all...]
H A Dutility_x86.cc928 for (MIR *mir = bb->first_mir_insn; mir != NULL; mir = mir->next) {
929 int opcode = mir->dalvikInsn.opcode;
931 AnalyzeExtendedMIR(opcode, bb, mir);
933 AnalyzeMIR(opcode, bb, mir);
939 void X86Mir2Lir::AnalyzeExtendedMIR(int opcode, BasicBlock * bb, MIR *mir) { argument
944 AnalyzeFPInstruction(opcode, bb, mir);
955 void X86Mir2Lir::AnalyzeMIR(int opcode, BasicBlock * bb, MIR *mir) { argument
991 AnalyzeFPInstruction(int opcode, BasicBlock * bb, MIR *mir) argument
1053 AnalyzeInvokeStatic(int opcode, BasicBlock * bb, MIR *mir) argument
[all...]
/art/compiler/dex/portable/
H A Dmir_to_gbc.cc329 void MirConverter::ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, argument
331 if (mir_graph_->GetBasicBlock(bb->taken)->start_offset <= mir->offset) {
345 MIR* mir, ConditionCode cc, RegLocation rl_src1) {
346 if (mir_graph_->GetBasicBlock(bb->taken)->start_offset <= mir->offset) {
467 void MirConverter::ConvertInvoke(BasicBlock* bb, MIR* mir, argument
469 CallInfo* info = mir_graph_->NewMemCallInfo(bb, mir, invoke_type, is_range);
703 bool MirConverter::ConvertMIRNode(MIR* mir, BasicBlock* bb, argument
708 Instruction::Code opcode = mir->dalvikInsn.opcode;
710 uint32_t vB = mir->dalvikInsn.vB;
711 uint32_t vC = mir
344 ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc, RegLocation rl_src1) argument
1598 ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb) argument
[all...]
H A Dmir_to_gbc.h117 void ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
119 void ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
135 void ConvertInvoke(BasicBlock* bb, MIR* mir, InvokeType invoke_type,
168 bool ConvertMIRNode(MIR* mir, BasicBlock* bb, ::llvm::BasicBlock* llvm_bb);
172 void ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb);
/art/compiler/dex/quick/mips/
H A Dcodegen_mips.h119 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
120 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
121 void GenSelect(BasicBlock* bb, MIR* mir);
131 void GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
132 void GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
133 bool GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special);
/art/compiler/dex/quick/arm/
H A Dcodegen_arm.h120 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
121 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
122 void GenSelect(BasicBlock* bb, MIR* mir);
134 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
135 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
H A Dfp_arm.cc214 void ArmMir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, argument
220 rl_src1 = mir_graph_->GetSrcWide(mir, 0);
221 rl_src2 = mir_graph_->GetSrcWide(mir, 2);
226 rl_src1 = mir_graph_->GetSrc(mir, 0);
227 rl_src2 = mir_graph_->GetSrc(mir, 1);
233 ConditionCode ccode = mir->meta.ccode;
/art/compiler/dex/quick/arm64/
H A Dfp_arm64.cc201 void Arm64Mir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, argument
207 rl_src1 = mir_graph_->GetSrcWide(mir, 0);
208 rl_src2 = mir_graph_->GetSrcWide(mir, 2);
213 rl_src1 = mir_graph_->GetSrc(mir, 0);
214 rl_src2 = mir_graph_->GetSrc(mir, 1);
219 ConditionCode ccode = mir->meta.ccode;

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