Searched refs:mips (Results 1 - 9 of 9) sorted by relevance

/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp9/
H A Dvp9_common.mk94 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_common_dspr2.h
95 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_avg_dspr2.c
96 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_avg_horiz_dspr2.c
97 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_dspr2.c
98 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_horiz_dspr2.c
99 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve2_vert_dspr2.c
100 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_avg_dspr2.c
101 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_avg_horiz_dspr2.c
102 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/vp9_convolve8_dspr2.c
103 VP9_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr
[all...]
/hardware/intel/img/libdrm/
H A Dconfig.guess406 echo mips-dec-mach_bsd4.3
409 echo mips-dec-ultrix${UNAME_RELEASE}
417 mips:*:*:UMIPS | mips:*:*:RISCos)
428 printf ("mips-mips-riscos%ssysv\n", argv[1]); exit (0);
431 printf ("mips-mips-riscos%ssvr4\n", argv[1]); exit (0);
434 printf ("mips-mips
[all...]
H A Dconfig.sub141 -dec* | -mips* | -sequent* | -encore* | -pc532* | -sgi* | -sony* | \
239 | mips | mipsbe | mipseb | mipsel | mipsle \
311 | mips-* | mipsbe-* | mipseb-* | mipsel-* | mipsle-* \
448 basic_machine=mips-dec
603 basic_machine=mips-sgi
620 basic_machine=mips-mips
685 basic_machine=mips-sony
722 basic_machine=mips-compaq
829 basic_machine=mips
[all...]
H A Dltmain.sh4757 # -64, -mips[0-9] enable 64-bit mode on the SGI compiler
4767 -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \
/hardware/intel/common/omx-components/videocodec/libvpx_internal/
H A Dlibvpx.mk17 ifeq ($(TARGET_ARCH),mips)
20 libvpx_target := mips-dspr2
23 libvpx_target := mips
31 endif #mips
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/
H A Dvp8_common.mk122 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/idctllm_dspr2.c
123 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/filter_dspr2.c
124 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/loopfilter_filters_dspr2.c
125 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/reconinter_dspr2.c
126 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/idct_blk_dspr2.c
127 VP8_COMMON_SRCS-$(HAVE_DSPR2) += common/mips/dspr2/dequantize_dspr2.c
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/build/make/
H A Drtcd.pl301 sub mips() { subroutine
376 mips;
H A Dconfigure.sh720 mips*) enable_feature mips;;
997 mips*)
1244 mips*)
/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/
H A Dconfigure232 mips
670 if enabled mips; then

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