/external/llvm/lib/CodeGen/ |
H A D | CodeGenPrepare.cpp | 1037 /// ExtAddrMode - This is an extended version of TargetLowering::AddrMode 1039 struct ExtAddrMode : public TargetLowering::AddrMode { 1509 /// AddrMode - This is the addressing mode that we're building up. This is 1511 ExtAddrMode &AddrMode; member in class:__anon25735::AddressingModeMatcher 1531 : AddrModeInsts(AMI), TLI(T), AccessTy(AT), MemoryInst(MI), AddrMode(AM), 1574 /// Return true and update AddrMode if this addr mode is legal for the target, 1589 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg) 1592 ExtAddrMode TestAddrMode = AddrMode; 1604 AddrMode 2500 ExtAddrMode AddrMode; local [all...] |
H A D | BasicTargetTransformInfo.cpp | 151 TargetLoweringBase::AddrMode AM; 162 TargetLoweringBase::AddrMode AM;
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2InstrInfo.cpp | 442 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); 447 AddrMode = ARMII::AddrModeT2_i12; // FIXME. mode for thumb2? 517 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) 523 if (AddrMode == ARMII::AddrModeT2_so) { 533 AddrMode = ARMII::AddrModeT2_i12; 538 if (AddrMode == ARMII::AddrModeT2_i8 || AddrMode == ARMII::AddrModeT2_i12) { 552 } else if (AddrMode == ARMII::AddrMode5) { 566 } else if (AddrMode [all...] |
H A D | ARMBaseRegisterInfo.cpp | 446 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local 450 switch (AddrMode) { 636 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); local 645 if (AddrMode == ARMII::AddrMode4 || AddrMode == ARMII::AddrMode6) 651 switch (AddrMode) {
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H A D | ARMISelLowering.h | 289 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; 290 bool isLegalT2ScaledAddressingMode(const AddrMode &AM, EVT VT) const;
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H A D | Thumb1RegisterInfo.cpp | 353 unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask); 437 if (AddrMode != ARMII::AddrModeT1_s)
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/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
H A D | HexagonBaseInfo.h | 62 enum AddrMode { enum in namespace:llvm::HexagonII
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/external/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMBaseInfo.h | 235 enum AddrMode { enum in namespace:llvm::ARMII 255 inline static const char *AddrModeToString(AddrMode addrmode) { 325 AddrModeMask = 0x1f, // The AddrMode enums are declared in ARMBaseInfo.h
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/external/vixl/src/a64/ |
H A D | simulator-a64.h | 487 AddrMode addrmode); 488 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode); 491 AddrMode addrmode);
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H A D | instructions-a64.h | 129 enum AddrMode { enum in namespace:vixl
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H A D | assembler-a64.h | 539 AddrMode addrmode = Offset); 550 AddrMode addrmode = Offset); 555 AddrMode addrmode() const { return addrmode_; } 568 AddrMode addrmode_;
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/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.h | 295 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; 302 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
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/external/chromium_org/v8/src/arm64/ |
H A D | instructions-arm64.h | 72 enum AddrMode { enum in namespace:v8::internal
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H A D | simulator-arm64.h | 667 AddrMode addrmode); 668 void LoadStorePairHelper(Instruction* instr, AddrMode addrmode); 670 AddrMode addrmode); 673 AddrMode addrmode);
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H A D | assembler-arm64.h | 703 AddrMode addrmode = Offset); 714 AddrMode addrmode = Offset); 719 AddrMode addrmode() const { return addrmode_; } 746 AddrMode addrmode_;
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.h | 166 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.h | 200 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.h | 210 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.h | 123 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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/external/chromium_org/v8/src/arm/ |
H A D | assembler-arm.h | 564 explicit MemOperand(Register rn, int32_t offset = 0, AddrMode am = Offset); 569 explicit MemOperand(Register rn, Register rm, AddrMode am = Offset); 575 ShiftOp shift_op, int shift_imm, AddrMode am = Offset); 578 AddrMode am = Offset)) { 595 AddrMode am() const { return am_; } 607 AddrMode am_; // bits P, U, and W 619 explicit NeonMemOperand(Register rn, AddrMode am = Offset, int align = 0);
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H A D | constants-arm.h | 260 enum AddrMode { enum in namespace:v8::internal
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.h | 663 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override; 682 int getScalingFactorCost(const AddrMode &AM, Type *Ty) const override;
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/external/llvm/include/llvm/Target/ |
H A D | TargetLowering.h | 1249 struct AddrMode { 1254 AddrMode() : BaseGV(nullptr), BaseOffs(0), HasBaseReg(false), Scale(0) {} 1263 virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const; 1271 virtual int getScalingFactorCost(const AddrMode &AM, Type *Ty) const {
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 578 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.h | 448 bool isLegalAddressingMode(const AddrMode &AM, Type *Ty) const override;
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