/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZRegisterInfo.cpp | 71 unsigned BasePtr = getFrameRegister(MF); local 77 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); 87 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 109 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 117 .addReg(BasePtr).addImm(HighOffset).addReg(0); 123 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr);
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/external/llvm/lib/Target/X86/ |
H A D | X86RegisterInfo.h | 52 /// BasePtr - X86 physical register used as a base ptr in complex stack 55 unsigned BasePtr; member in class:llvm::final 126 unsigned getBaseRegister() const { return BasePtr; }
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H A D | X86RegisterInfo.cpp | 81 BasePtr = Is64Bit ? X86::RBX : X86::ESI; 437 return MRI->canReserveReg(BasePtr); 478 unsigned BasePtr; local 483 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); 485 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 487 BasePtr = StackPtr; 489 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); 493 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 507 assert(BasePtr == FramePtr && "Expected the FP as base register");
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H A D | X86FrameLowering.cpp | 465 unsigned BasePtr = RegInfo->getBaseRegister(); 808 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr) 1260 // Spill the BasePtr if it's used.
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/external/chromium_org/third_party/webrtc/voice_engine/test/auto_test/ |
H A D | voe_stress_test.cc | 121 VoEBase* base = _mgr.BasePtr(); 196 VoEBase* base = _mgr.BasePtr(); 306 VoEBase* base = _mgr.BasePtr(); 392 VoEBase* base = _mgr.BasePtr();
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H A D | voe_cpu_test.cc | 48 VoEBase* base = _mgr.BasePtr();
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H A D | voe_standard_test.h | 138 VoEBase* BasePtr() const { function in class:voetest::VoETestManager
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/external/llvm/lib/CodeGen/ |
H A D | ShadowStackGC.cpp | 68 IRBuilder<> &B, Value *BasePtr, 71 IRBuilder<> &B, Value *BasePtr, 350 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, argument 355 Value* Val = B.CreateGEP(BasePtr, Indices, Name); 363 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, argument 367 Value *Val = B.CreateGEP(BasePtr, Indices, Name);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMBaseRegisterInfo.h | 90 /// BasePtr - ARM physical register used as a base ptr in complex stack 93 unsigned BasePtr; member in class:llvm::ARMBaseRegisterInfo 162 unsigned getBaseRegister() const { return BasePtr; }
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H A D | ARMBaseRegisterInfo.cpp | 47 : ARMGenRegisterInfo(ARM::LR, 0, 0, ARM::PC), STI(sti), BasePtr(ARM::R6) { 135 Reserved.set(BasePtr); 361 return MRI->canReserveReg(BasePtr);
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H A D | Thumb1FrameLowering.cpp | 105 unsigned BasePtr = RegInfo->getBaseRegister(); local 289 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
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H A D | Thumb1RegisterInfo.cpp | 581 FrameReg = BasePtr;
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/external/llvm/lib/Target/MSP430/ |
H A D | MSP430RegisterInfo.cpp | 116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW); local 137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); 154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorTypes.cpp | 2735 SDValue BasePtr = LD->getBasePtr(); local 2749 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(), 2785 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, 2786 DAG.getConstant(Increment, BasePtr.getValueType())); 2793 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, 2809 L = DAG.getLoad(NewVT, dl, Chain, BasePtr, 2888 SDValue BasePtr = LD->getBasePtr(); local 2902 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, 2933 SDValue BasePtr = ST->getBasePtr(); local 3002 SDValue BasePtr = ST->getBasePtr(); local [all...] |
H A D | DAGCombiner.cpp | 7620 SDValue BasePtr; 7623 if (!TLI.getPreIndexedAddressParts(N, BasePtr, Offset, AM, DAG)) 7630 if (isa<ConstantSDNode>(BasePtr)) { 7631 std::swap(BasePtr, Offset); 7650 if (isa<FrameIndexSDNode>(BasePtr) || isa<RegisterSDNode>(BasePtr)) 7656 if (Val == BasePtr || BasePtr.getNode()->isPredecessorOf(Val.getNode())) 7665 for (SDNode *Use : BasePtr.getNode()->uses()) { 7678 if (Op1.getNode() == BasePtr 7848 SDValue BasePtr; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 439 SDValue BasePtr = LD->getBasePtr(); local 445 if (DAG.isBaseWithConstantOffset(BasePtr) && 446 isWordAligned(BasePtr->getOperand(0), DAG)) { 447 SDValue NewBasePtr = BasePtr->getOperand(0); 448 Offset = cast<ConstantSDNode>(BasePtr->getOperand(1))->getSExtValue(); 452 if (TLI.isGAPlusOffset(BasePtr.getNode(), GV, Offset) && 455 BasePtr->getValueType(0)); 463 BasePtr, LD->getPointerInfo(), MVT::i16, 465 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, 481 // Lower to a call to __misaligned_load(BasePtr) 517 SDValue BasePtr = ST->getBasePtr(); local [all...] |
/external/llvm/lib/Transforms/Scalar/ |
H A D | LoopIdiomRecognize.cpp | 991 Value *BasePtr = local 995 if (mayLoopAccessLocation(BasePtr, AliasAnalysis::ModRef, 1000 deleteIfDeadInstruction(BasePtr, *SE, TLI); 1023 NewCall = Builder.CreateMemSet(BasePtr, 1047 NewCall = Builder.CreateCall3(MSP, BasePtr, PatternPtr, NumBytes);
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H A D | SROA.cpp | 1261 /// This will return the BasePtr if that is valid, or build a new GEP 1263 static Value *buildGEP(IRBuilderTy &IRB, Value *BasePtr, argument 1266 return BasePtr; 1271 return BasePtr; 1273 return IRB.CreateInBoundsGEP(BasePtr, Indices, NamePrefix + "sroa_idx"); 1276 /// \brief Get a natural GEP off of the BasePtr walking through Ty toward 1286 Value *BasePtr, Type *Ty, Type *TargetTy, 1290 return buildGEP(IRB, BasePtr, Indices, NamePrefix); 1293 unsigned PtrSize = DL.getPointerTypeSizeInBits(BasePtr->getType()); 1322 return buildGEP(IRB, BasePtr, Indice 1285 getNaturalGEPWithType(IRBuilderTy &IRB, const DataLayout &DL, Value *BasePtr, Type *Ty, Type *TargetTy, SmallVectorImpl<Value *> &Indices, Twine NamePrefix) argument [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
H A D | SIISelLowering.cpp | 348 ConstantSDNode *BasePtr = dyn_cast<ConstantSDNode>(Ptr->getBasePtr()); local 349 assert(BasePtr); 364 uint64_t Index = BasePtr->getZExtValue();
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/external/mesa3d/src/gallium/drivers/radeon/ |
H A D | SIISelLowering.cpp | 348 ConstantSDNode *BasePtr = dyn_cast<ConstantSDNode>(Ptr->getBasePtr()); local 349 assert(BasePtr); 364 uint64_t Index = BasePtr->getZExtValue();
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/external/clang/lib/AST/ |
H A D | CXXInheritance.cpp | 105 const void *BasePtr = static_cast<const void*>(Base->getCanonicalDecl()); local 107 const_cast<void *>(BasePtr),
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/external/llvm/lib/Analysis/ |
H A D | ConstantFolding.cpp | 793 APInt BasePtr(BitWidth, 0); 797 BasePtr = Base->getValue().zextOrTrunc(BitWidth); 801 if (Ptr->isNullValue() || BasePtr != 0) { 802 Constant *C = ConstantInt::get(Ptr->getContext(), Offset + BasePtr);
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/external/clang/lib/CodeGen/ |
H A D | CGClass.cpp | 617 llvm::Type *BasePtr = ConvertType(BaseElementTy); local 618 BasePtr = llvm::PointerType::getUnqual(BasePtr); 620 BasePtr);
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/external/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 1154 SDValue BasePtr = Load->getBasePtr(); local 1158 BasePtr, MVT::i8, MMO); 1246 SDValue BasePtr = Store->getBasePtr(); local 1247 SDValue Ptr = DAG.getNode(ISD::SRL, DL, MVT::i32, BasePtr, 1252 SDValue ByteIdx = DAG.getNode(ISD::AND, DL, MVT::i32, BasePtr,
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H A D | SIISelLowering.cpp | 294 SDValue BasePtr = DAG.getCopyFromReg(Chain, DL, local 296 SDValue Ptr = DAG.getNode(ISD::ADD, DL, MVT::i64, BasePtr,
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