Searched refs:CC0 (Results 1 - 2 of 2) sorted by relevance
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 2593 SDValue LL, LR, RL, RR, CC0, CC1; local
2761 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
2762 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
3231 SDValue LL, LR, RL, RR, CC0, CC1; local
3357 if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
3358 ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
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| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 12186 unsigned CC0, CC1;
12189 CC0 = 3; CC1 = 0; CombineOpc = ISD::OR;
12192 CC0 = 7; CC1 = 4; CombineOpc = ISD::AND;
12196 DAG.getConstant(CC0, MVT::i8));
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