Searched refs:CST_PP_CNTL_X (Results 1 - 10 of 10) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/
H A Dr200_fragshader.c344 rmesa->hw.cst.cmd[CST_PP_CNTL_X] &= ~(R200_PPX_PFS_INST_ENABLE_MASK |
359 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |=
429 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg;
445 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg;
488 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= 1 <<
H A Dr200_context.h440 #define CST_PP_CNTL_X 1 macro
H A Dr200_texstate.c1619 if (!(rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_1_ENABLE))
1633 if ((rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_ENABLE_MASK) == R200_PPX_TEX_0_ENABLE &&
1638 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_1_ENABLE;
H A Dr200_state.c2051 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
2082 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
H A Dr200_state_init.c1024 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
/external/mesa3d/src/mesa/drivers/dri/r200/
H A Dr200_fragshader.c344 rmesa->hw.cst.cmd[CST_PP_CNTL_X] &= ~(R200_PPX_PFS_INST_ENABLE_MASK |
359 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |=
429 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg;
445 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_0_ENABLE << reg;
488 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= 1 <<
H A Dr200_context.h440 #define CST_PP_CNTL_X 1 macro
H A Dr200_texstate.c1619 if (!(rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_1_ENABLE))
1633 if ((rmesa->hw.cst.cmd[CST_PP_CNTL_X] & R200_PPX_TEX_ENABLE_MASK) == R200_PPX_TEX_0_ENABLE &&
1638 rmesa->hw.cst.cmd[CST_PP_CNTL_X] |= R200_PPX_TEX_1_ENABLE;
H A Dr200_state.c2051 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
2082 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;
H A Dr200_state_init.c1024 rmesa->hw.cst.cmd[CST_PP_CNTL_X] = 0;

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