/external/chromium_org/third_party/skia/src/svg/ |
H A D | SkSVGDefs.cpp | 12 DEFINE_SVG_NO_INFO(Defs)
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H A D | SkSVGDefs.h | 16 DECLARE_SVG_INFO(Defs);
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/external/skia/src/svg/ |
H A D | SkSVGDefs.cpp | 12 DEFINE_SVG_NO_INFO(Defs)
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H A D | SkSVGDefs.h | 16 DECLARE_SVG_INFO(Defs);
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/external/llvm/lib/CodeGen/ |
H A D | LivePhysRegs.cpp | 35 /// Remove Defs, add uses. This is the recommended way of calculating liveness. 66 SmallVector<unsigned, 4> Defs; local 75 Defs.push_back(Reg); 87 for (unsigned i = 0, e = Defs.size(); i != e; ++i) 88 addReg(Defs[i]);
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H A D | MachineCopyPropagation.cpp | 72 const DestList& Defs = SI->second; local 73 for (DestList::const_iterator I = Defs.begin(), E = Defs.end(); 239 SmallVector<unsigned, 2> Defs; local 256 Defs.push_back(Reg); 299 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 300 unsigned Reg = Defs[i];
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H A D | MachineInstrBundle.cpp | 122 SmallVector<MachineOperand*, 4> Defs; local 129 Defs.push_back(&MO); 154 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 155 MachineOperand &MO = *Defs[i]; 182 Defs.clear();
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H A D | LiveVariables.cpp | 444 SmallVectorImpl<unsigned> &Defs) { 483 Defs.push_back(Reg); // Remember this def. 487 SmallVectorImpl<unsigned> &Defs) { 488 while (!Defs.empty()) { 489 unsigned Reg = Defs.back(); 490 Defs.pop_back(); 534 SmallVector<unsigned, 4> Defs; local 539 HandlePhysRegDef(*II, nullptr, Defs); 602 HandlePhysRegDef(MOReg, MI, Defs); 604 UpdatePhysRegDefs(MI, Defs); 443 HandlePhysRegDef(unsigned Reg, MachineInstr *MI, SmallVectorImpl<unsigned> &Defs) argument 486 UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs) argument 786 SmallSet<unsigned, 16> Defs, Kills; local [all...] |
H A D | RegisterPressure.cpp | 319 SmallVector<unsigned, 8> Defs; member in class:RegisterOperands 338 pushRegUnits(MO.getReg(), Defs); 368 std::bind1st(std::ptr_fun(containsReg), RegOpers.Defs)); 415 for (unsigned i = 0, e = RegOpers.Defs.size(); i != e; ++i) 416 PDiff.addPressureChange(RegOpers.Defs[i], true, MRI); 500 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 501 unsigned Reg = RegOpers.Defs[i]; 544 for (unsigned i = 0, e = RegOpers.Defs.size(); i < e; ++i) { 545 unsigned Reg = RegOpers.Defs[i]; 605 for (unsigned i = 0, e = RegOpers.Defs [all...] |
H A D | MachineLICM.cpp | 848 SmallVector<unsigned, 4> Defs; 859 Defs.push_back(Reg); 871 while (!Defs.empty()) { 872 unsigned Reg = Defs.pop_back_val(); 1337 SmallVector<unsigned, 2> Defs; local 1349 Defs.push_back(i); 1353 for (unsigned i = 0, e = Defs.size(); i != e; ++i) { 1354 unsigned Idx = Defs[i]; 1362 MRI->setRegClass(Dup->getOperand(Defs[j]).getReg(), OrigRCs[j]); 1367 for (unsigned i = 0, e = Defs [all...] |
H A D | LiveDebugVariables.cpp | 639 SmallVector<std::pair<SlotIndex, unsigned>, 16> Defs; local 644 Defs.push_back(std::make_pair(I.start(), I.value())); 647 for (unsigned i = 0; i != Defs.size(); ++i) { 648 SlotIndex Idx = Defs[i].first; 649 unsigned LocNo = Defs[i].second; 668 addDefsFromCopies(LI, LocNo, Kills, Defs, MRI, LIS);
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H A D | ScheduleDAGInstrs.cpp | 308 if (!Defs.contains(*Alias)) 310 for (Reg2SUnitsMap::iterator I = Defs.find(*Alias); I != Defs.end(); ++I) { 347 Defs.eraseAll(Reg); 354 Reg2SUnitsMap::RangePair P = Defs.equal_range(Reg); 361 I = Defs.erase(I); 365 // Defs are pushed in the order they are visited and never reordered. 366 Defs.insert(PhysRegSUOper(SU, OperIdx, Reg)); 770 assert(Defs.empty() && Uses.empty() && 771 "Only BuildGraph should update Defs/Use [all...] |
H A D | TwoAddressInstructionPass.cpp | 798 SmallSet<unsigned, 2> Defs; local 807 Defs.insert(MOReg); 821 while (End->isCopy() && Defs.count(End->getOperand(1).getReg())) { 822 Defs.insert(End->getOperand(0).getReg()); 853 if (!MO.isDead() && Defs.count(MOReg)) 859 if (Defs.count(MOReg)) 981 SmallSet<unsigned, 2> Defs; local 1000 Defs.insert(MOReg); 1030 if (Defs.count(MOReg)) 1054 Defs [all...] |
H A D | BranchFolding.cpp | 1493 SmallSet<unsigned,4> &Defs) { 1517 Defs.insert(*AI); 1582 Defs.insert(*AI); 1611 SmallSet<unsigned, 4> Uses, Defs; 1613 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs); 1666 if (Defs.count(Reg) && !MO.isDead()) { 1682 if (Defs.count(Reg)) { 1489 findHoistingInsertPosAndDeps(MachineBasicBlock *MBB, const TargetInstrInfo *TII, const TargetRegisterInfo *TRI, SmallSet<unsigned,4> &Uses, SmallSet<unsigned,4> &Defs) argument
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/external/llvm/lib/Target/ARM/ |
H A D | Thumb2ITBlockPass.cpp | 46 SmallSet<unsigned, 4> &Defs, 57 SmallSet<unsigned, 4> &Defs, 87 Defs.insert(*Subreg); 108 SmallSet<unsigned, 4> &Defs, 123 if (Uses.count(DstReg) || Defs.count(SrcReg)) 165 SmallSet<unsigned, 4> Defs; local 178 Defs.clear(); 180 TrackDefUses(MI, Defs, Uses, TRI); 221 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) { 230 TrackDefUses(NMI, Defs, Use 56 TrackDefUses(MachineInstr *MI, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses, const TargetRegisterInfo *TRI) argument 106 MoveCopyOutOfITBlock(MachineInstr *MI, ARMCC::CondCodes CC, ARMCC::CondCodes OCC, SmallSet<unsigned, 4> &Defs, SmallSet<unsigned, 4> &Uses) argument [all...] |
H A D | A15SDOptimizer.cpp | 407 SmallVector<unsigned, 8> Defs; 418 Defs.push_back(MO.getReg()); 420 return Defs; 614 SmallVector<unsigned, 8> Defs = getReadDPRs(MI); local 617 for (SmallVectorImpl<unsigned>::iterator I = Defs.begin(), E = Defs.end();
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/external/llvm/utils/TableGen/ |
H A D | CTagsEmitter.cpp | 73 const std::map<std::string, Record *> &Defs = Records.getDefs(); local 76 Tags.reserve(Classes.size() + Defs.size()); 81 for (std::map<std::string, Record *>::const_iterator I = Defs.begin(), 82 E = Defs.end();
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H A D | InstrInfoEmitter.cpp | 368 std::vector<Record*> Defs = Inst->getValueAsListOfDefs("Defs"); local 369 if (!Defs.empty()) { 370 unsigned &IL = EmittedLists[Defs]; 371 if (!IL) PrintDefList(Defs, IL = ++ListNumber, OS); 530 std::vector<Record*> DefList = Inst.TheDef->getValueAsListOfDefs("Defs");
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/external/llvm/lib/Target/Mips/ |
H A D | MipsDelaySlotFiller.cpp | 75 /// This function sets all caller-saved registers in Defs. 78 /// This function sets all unallocatable registers in Defs. 96 BitVector Defs, Uses; member in class:__anon26049::RegDefsUses 150 /// Update Defs and Uses. Return true if there exist dependences that 152 /// Defs. 160 SmallPtrSet<ValueType, 4> Uses, Defs; member in class:__anon26049::MemDefsUses 289 : TRI(*TM.getRegisterInfo()), Defs(TRI.getNumRegs(), false), 296 // If MI is a call, add RA to Defs to prevent users of RA from going into 299 Defs.set(Mips::RA); 305 Defs [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | LiveVariables.h | 160 SmallVectorImpl<unsigned> &Defs); 161 void UpdatePhysRegDefs(MachineInstr *MI, SmallVectorImpl<unsigned> &Defs);
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H A D | ScheduleDAGInstrs.h | 129 /// Defs, Uses - Remember where defs and uses of each register are as we 133 Reg2SUnitsMap Defs; member in class:llvm::ScheduleDAGInstrs 140 /// unknown store, as we iterate. As with Defs and Uses, this is here
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/external/clang/utils/TableGen/ |
H A D | NeonEmitter.cpp | 491 void genBuiltinsDef(raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs); 493 SmallVectorImpl<Intrinsic *> &Defs); 495 SmallVectorImpl<Intrinsic *> &Defs); 1957 SmallVectorImpl<Intrinsic *> &Defs) { 1964 for (auto *Def : Defs) { 1988 SmallVectorImpl<Intrinsic *> &Defs) { 2002 for (auto *Def : Defs) { 2084 SmallVectorImpl<Intrinsic *> &Defs) { 2089 for (auto *Def : Defs) { 2171 SmallVector<Intrinsic *, 128> Defs; local 1956 genBuiltinsDef(raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs) argument 1987 genOverloadTypeCheckCode(raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs) argument 2083 genIntrinsicRangeCheckCode(raw_ostream &OS, SmallVectorImpl<Intrinsic *> &Defs) argument 2330 SmallVector<Intrinsic *, 128> Defs; local [all...] |
/external/clang/include/clang/Sema/ |
H A D | MultiplexExternalSemaSource.h | 246 void ReadTentativeDefinitions(SmallVectorImpl<VarDecl*> &Defs) override;
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/external/llvm/lib/Target/X86/ |
H A D | X86FloatingPoint.cpp | 883 unsigned Defs = Mask; 887 if (!(Defs & (1 << RegNo))) 892 Defs &= ~(1 << RegNo); 894 assert((Kills & Defs) == 0 && "Register needs killing and def'ing?"); 897 while (Kills && Defs) { 899 unsigned DReg = countTrailingZeros(Defs); 904 Defs &= ~(1 << DReg); 929 while(Defs) { 930 unsigned DReg = countTrailingZeros(Defs); 934 Defs [all...] |
/external/llvm/include/llvm/TableGen/ |
H A D | Record.h | 1644 std::map<std::string, Record*> Classes, Defs; member in class:llvm::RecordKeeper 1651 for (std::map<std::string, Record*>::iterator I = Defs.begin(), 1652 E = Defs.end(); I != E; ++I) 1657 const std::map<std::string, Record*> &getDefs() const { return Defs; } 1664 std::map<std::string, Record*>::const_iterator I = Defs.find(Name); 1665 return I == Defs.end() ? nullptr : I->second; 1673 bool Ins = Defs.insert(std::make_pair(R->getName(), R)).second; 1687 assert(Defs.count(Name) && "Def does not exist!"); 1688 Defs.erase(Name);
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