Searched refs:FrameIndex (Results 1 - 25 of 92) sorted by relevance

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/external/llvm/lib/Target/R600/
H A DSIMachineFunctionInfo.cpp87 void SIMachineFunctionInfo::RegSpillTracker::addSpilledReg(unsigned FrameIndex, argument
90 SpilledRegisters[FrameIndex] = SpilledReg(Reg, Lane);
94 SIMachineFunctionInfo::RegSpillTracker::getSpilledReg(unsigned FrameIndex) { argument
95 return SpilledRegisters[FrameIndex];
H A DAMDGPUInstrInfo.h58 int &FrameIndex) const override;
60 int &FrameIndex) const override;
63 int &FrameIndex) const override;
64 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
66 int &FrameIndex) const;
69 int &FrameIndex) const;
86 unsigned SrcReg, bool isKill, int FrameIndex,
91 unsigned DestReg, int FrameIndex,
99 int FrameIndex) const override;
H A DSIMachineFunctionInfo.h52 void addSpilledReg(unsigned FrameIndex, unsigned Reg, int Lane = -1);
53 const SpilledReg& getSpilledReg(unsigned FrameIndex);
H A DAMDGPUInstrInfo.cpp48 int &FrameIndex) const {
54 int &FrameIndex) const {
61 int &FrameIndex) const {
66 int &FrameIndex) const {
71 int &FrameIndex) const {
77 int &FrameIndex) const {
109 int FrameIndex,
118 unsigned DestReg, int FrameIndex,
176 int FrameIndex) const {
106 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
116 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
/external/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.h52 /// the destination along with the FrameIndex of the loaded stack slot. If
56 int &FrameIndex) const override;
60 /// the source reg along with the FrameIndex of the loaded stack slot. If
64 int &FrameIndex) const override;
85 unsigned SrcReg, bool isKill, int FrameIndex,
91 unsigned DestReg, int FrameIndex,
/external/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.h39 /// the destination along with the FrameIndex of the loaded stack slot. If
43 int &FrameIndex) const override;
47 /// the source reg along with the FrameIndex of the loaded stack slot. If
51 int &FrameIndex) const override;
72 unsigned SrcReg, bool isKill, int FrameIndex,
78 unsigned DestReg, int FrameIndex,
H A DXCoreInstrInfo.cpp60 /// the destination along with the FrameIndex of the loaded stack slot. If
64 XCoreInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const{
72 FrameIndex = MI->getOperand(1).getIndex();
81 /// the source reg along with the FrameIndex of the loaded stack slot. If
86 int &FrameIndex) const {
94 FrameIndex = MI->getOperand(1).getIndex();
371 int FrameIndex,
381 MF->getMachineMemOperand(MachinePointerInfo::getFixedStack(FrameIndex),
383 MFI.getObjectSize(FrameIndex),
384 MFI.getObjectAlignment(FrameIndex));
368 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
392 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUInstrInfo.cpp44 int &FrameIndex) const {
50 int &FrameIndex) const {
57 int &FrameIndex) const {
62 int &FrameIndex) const {
67 int &FrameIndex) const {
73 int &FrameIndex) const {
125 int FrameIndex,
134 unsigned DestReg, int FrameIndex,
144 int FrameIndex) const {
122 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
132 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
H A DAMDGPUInstrInfo.h54 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
56 int &FrameIndex) const;
59 int &FrameIndex) const;
60 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
62 int &FrameIndex) const;
65 int &FrameIndex) const;
80 unsigned SrcReg, bool isKill, int FrameIndex,
85 unsigned DestReg, int FrameIndex,
93 int FrameIndex) const;
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDGPUInstrInfo.cpp44 int &FrameIndex) const {
50 int &FrameIndex) const {
57 int &FrameIndex) const {
62 int &FrameIndex) const {
67 int &FrameIndex) const {
73 int &FrameIndex) const {
125 int FrameIndex,
134 unsigned DestReg, int FrameIndex,
144 int FrameIndex) const {
122 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
132 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
H A DAMDGPUInstrInfo.h54 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
56 int &FrameIndex) const;
59 int &FrameIndex) const;
60 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const;
62 int &FrameIndex) const;
65 int &FrameIndex) const;
80 unsigned SrcReg, bool isKill, int FrameIndex,
85 unsigned DestReg, int FrameIndex,
93 int FrameIndex) const;
/external/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h92 unsigned SrcReg, bool isKill, int FrameIndex,
95 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0);
100 unsigned DestReg, int FrameIndex,
103 loadRegFromStack(MBB, MBBI, DestReg, FrameIndex, RC, TRI, 0);
108 unsigned SrcReg, bool isKill, int FrameIndex,
115 unsigned DestReg, int FrameIndex,
H A DMipsSEInstrInfo.h33 /// the destination along with the FrameIndex of the loaded stack slot. If
37 int &FrameIndex) const override;
41 /// the source reg along with the FrameIndex of the loaded stack slot. If
45 int &FrameIndex) const override;
54 unsigned SrcReg, bool isKill, int FrameIndex,
61 unsigned DestReg, int FrameIndex,
H A DMipsSERegisterInfo.h35 int FrameIndex, uint64_t StackSize,
H A DMips16InstrInfo.h32 /// the destination along with the FrameIndex of the loaded stack slot. If
36 int &FrameIndex) const override;
40 /// the source reg along with the FrameIndex of the loaded stack slot. If
44 int &FrameIndex) const override;
53 unsigned SrcReg, bool isKill, int FrameIndex,
60 unsigned DestReg, int FrameIndex,
H A DMips16RegisterInfo.h42 int FrameIndex, uint64_t StackSize,
H A DMips16RegisterInfo.cpp81 unsigned OpNo, int FrameIndex,
106 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
80 eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, int FrameIndex, uint64_t StackSize, int64_t SPOffset) const argument
H A DMipsSERegisterInfo.cpp106 unsigned OpNo, int FrameIndex,
123 bool EhDataRegFI = MipsFI->isEhDataRegFI(FrameIndex);
134 if ((FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) || EhDataRegFI)
105 eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo, int FrameIndex, uint64_t StackSize, int64_t SPOffset) const argument
/external/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.h73 unsigned FrameIndex) const;
75 unsigned FrameIndex) const;
77 unsigned FrameIndex) const;
79 unsigned FrameIndex) const;
81 unsigned FrameIndex) const;
83 unsigned FrameIndex) const;
/external/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.h47 unsigned SrcReg, bool isKill, int FrameIndex,
53 unsigned DestReg, int FrameIndex,
H A DThumb2InstrInfo.h49 unsigned SrcReg, bool isKill, int FrameIndex,
55 unsigned DestReg, int FrameIndex,
/external/llvm/include/llvm/CodeGen/
H A DRegisterScavenging.h45 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
48 int FrameIndex; member in struct:llvm::RegScavenger::ScavengedInfo
136 if (I->FrameIndex == FI)
146 if (I->FrameIndex >= 0)
147 A.push_back(I->FrameIndex);
/external/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp98 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); local
101 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
/external/llvm/lib/Target/X86/
H A DX86InstrInfo.h188 int &FrameIndex) const override;
193 int &FrameIndex) const override;
196 int &FrameIndex) const override;
201 int &FrameIndex) const override;
270 unsigned SrcReg, bool isKill, int FrameIndex,
283 unsigned DestReg, int FrameIndex,
305 int FrameIndex) const override;
456 /// isFrameOperand - Return true and the FrameIndex if the specified
459 int &FrameIndex) const;
/external/llvm/include/llvm/Target/
H A DTargetInstrInfo.h123 /// the destination along with the FrameIndex of the loaded stack slot. If
127 int &FrameIndex) const {
135 int &FrameIndex) const {
140 /// a load from a stack slot, return true along with the FrameIndex
148 int &FrameIndex) const;
152 /// the source reg along with the FrameIndex of the loaded stack slot. If
156 int &FrameIndex) const {
164 int &FrameIndex) const {
169 /// store to a stack slot, return true along with the FrameIndex of
176 int &FrameIndex) cons
526 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
539 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC, const TargetRegisterInfo *TRI) const argument
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