Searched refs:GPR_REG (Results 1 - 4 of 4) sorted by relevance

/external/pcre/dist/sljit/
H A DsljitNativeSPARC_common.c394 #define GPR_REG 0x0f macro
535 | ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg))
537 ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS));
592 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base && reg != OFFS_REG(arg))
613 else if ((flags & LOAD_DATA) && ((flags & MEM_MASK) <= GPR_REG) && reg != base)
621 dest = ((flags & MEM_MASK) <= GPR_REG ? D(reg) : DA(reg));
622 delay_slot = ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? DR(reg) : MOVABLE_INS;
H A DsljitNativePPC_common.c525 #define GPR_REG 0x3f macro
733 ((inst) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
737 (((inst) & ~(INT_ALIGNED | UPDATE_REQ)) | (((flags) & MEM_MASK) <= GPR_REG ? D(reg) : FD(reg)))
969 tmp_r = ((inp_flags & LOAD_DATA) && ((inp_flags) & MEM_MASK) <= GPR_REG) ? reg : TMP_REG1;
H A DsljitNativeMIPS_common.c501 #define GPR_REG 0x0f macro
725 | TA(reg_ar) | IMM(argw), ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) ? reg_ar : MOVABLE_INS));
767 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA)) {
H A DsljitNativeTILEGX_64.c90 #define GPR_REG 0xf macro
1401 if ((flags & MEM_MASK) <= GPR_REG && (flags & LOAD_DATA))

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